QorIQ Qonverge Base Station SoC Roadmap Update

June 2012 

TM 

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, 

ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PowerQUICC, 

Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of 

Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, 

CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, 

Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, TurboLink, Vybrid and 

Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or service 

names are the property of their respective owners. © 2012 Freescale Semiconductor, Inc. 

. 

Stephen Turnbull 

Wireless Access Division, Marketing Manager

Market Outlook 

• ―Mobile broadband subscriptions are up from 900M in 2011 to 

almost 5B in 2016 and 10-fold mobile traffic growth between 2011 

and 2016, mainly driven by video; by 2015 90% of Internet traffic will 

be video. Tablet users are heavy consumers of video outside the 

home” (Ericsson, April 2012) 

Technology Drivers 

• Provide high performance 

• Reduced OPEX and CAPEX 

− Reduce overall total cost 

of ownership considerably 

− Easy installations 

− Saving site rentals/acquisitions 

− Energy efficient 

• Multi-standard support 

Continuum of applications of small cell technology 

(Source: Small Cell Forum, February, 2012) 

TM 

2 

‘By 2016, 30% of Earth’s population will live in less 

than 1% of its total land area; around 60% of mobile 

traffic will be generated in Metro and Urban areas’ 

(Ericsson, April 2012) 

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, 

mobileGT, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc., 

Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC Engine, 

Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All 

other product or service names are the property of their respective owners. © 2012 Freescale Semiconductor, Inc.

Power Consumption Surging 

as BS Number Increases 

Dynamic Load Network Challenge 

TM 

Source: China Mobile, MWC 2012 

3 

Number of base stations will 

increase driven by LTE and small 

cells deployment 

We have highly imbalanced 

network loads at different times of 

the day driven by commuters in 

major cities 






CAPEX and OPEX associated 

with cell sites 

TM 

Source: China Mobile, MWC 2012 

4 

BTS electricity consumption 

is the biggest OPEX concern 

for a wireless operator 

Macro and metrocells require 

common O&M to have optimal 

OPEX while expanding the number 

of BTS 






Base Station 

Sub-Segment 

Macro 

Hundreds of users 

Metro/Microcell 

Up to 200 users 

Enterprise 

Pico/Femto 

Hot spots, campuses, 

high-rise buildings 

32 to 64 users 

Home/SMB Femto 

8 to16 users 

TM 

Edge 

Enterprise 

Pico/Femto 

Femto BTS 

Standalone or 

integrated into 

RGW, STB 

5 

Macro 

BTS 

Micro/Pico 

BTS 

Access Network 

Ethernet/WDM (OTN) 

BSC / 

RNC/AGW 

DSLAM/MSAN BRAS 






• Lower CAPEX with targeted coverage, affordable LTE roll out 

• Lower OPEX with less redundancy 

• Better user experience, higher data rates, more complete coverage 

Internet 

Femto 

Internet 

Backhaul 

TM 

Femto 

Pico 

CORE 

NETWORK 

Pico and RRH 

Dedicated Backhauls 

6 

Relay RF 

Backhaul 

RRH 

Relay 






Industry’s First Comprehensive 

Portfolio of Multimode Solutions 

• Common architecture, scales from 

small cells to large cells 

• Common architecture supports multiple standards, 

including LTE 

• Integrates powerful MPU, DSP, and accelerator cores 

in a heterogeneous, many-core implementation 

• Higher performance, lower cost, 

and improved power efficiency 

FPGA 

ASIC 

TM 

MPU 

DSP 

7 






32 to 100 

users 

8 to 16 users 

NEW 

(28 nm) 

100 to 256 users 

(45 nm) 

(45 nm) 

• Broad portfolio from femto to macro with on-time, on-specification release track record 

• Common architecture and software tool sets including CodeWarrior Development Suite 

• Software and tools ecosystem catering for Tier-1 wireless OEMs and broad market customers 

• Rich third-party ecosystem for tools, operating system and application software 

TM 

1000+ users 

(28 nm) 

8 

QorIQ Qonverge Base Station-on-Chip SoC Series 

• Advanced core and acceleration technologies, highly- 

balanced architectures for baseband processing 

integration, advanced process technologies 

• Freescale delivers industry’s first complete SoC 

portfolio, on a common platform, from home femto to 

multi-sector macro base stations 

• Software compatibility across different devices 

• Layer 1 and transport software stacks for small cell 

solutions to further expedite time to market 

• Adopted by industry-leading base station OEMs 






Macro & C-RAN 

1000+ users 

LTE 1.8 Gbps 

8 x 8 MiMO 

WCDMA - 6 Cells 

Metro 

100 - 200+ Users 

LTE 600 Mbps 

4 x 4 MiMO 

WCDMA – 4 cells 

Pico/Enterprise 

32 – 100 Users 

LTE 300 Mbps 

4 x 4 MiMO 


Home/SMB 

8 – 16 Users 

LTE 150 Mbps 

WCDMA – 1 cell 

2 x 2 MiMO 

P4080 

MSC8156 

MSC8157/8 

MSC8156 

MSC8157 

P2020 

MSC8154 

P1014 

MPC8313 

Production Execution Planning Proposal 

Available Now 2012 2013 2014 

TM 

P3041 

BSC9131 

BSC9130 

Pin Compatible Family 

Sample 

1Q 

Production 

BSC9132 

2Q 3Q 4Q 

9 

B4860 

B4420 

1Q 

NEW 

2Q 3Q 4Q 

Discrete – 45 nm 

SoC – 45 nm 

Pin Compatible Families 

Metro NG 

2Q 3Q 4Q 





other product or service names are the property of their respective owners. © 2012 Freescale Semiconductor, Inc. 

1Q 

B4xxx 

Enterprise NG 

Femto NG 

Discrete – 28 nm SoC – 20 nm 

SoC – 28 nm

Introducing the 

QorIQ Qonverge 

First products from QorIQ Qonverge portfolio— 

most comprehensive multimode platform solutions 

Highly integrated solution with RFIC and antenna, 

built on Freescale technology, to communicate 

directly with leading RF chipset solutions and 

providing support for GPS synchronization 

Combined field-proven SC3850 DSP and e500 

CPU technologies, already deployed in live LTE 

macrocell base stations, into one scalable SoC 

TM 

10 

Single platform offers unprecedented scalability 

and software compatibility allowing customers to 

design small cell to large cell solutions 

Optimal balance for system software partitioning 

enabling best of breed StarCore SC3850 DSP and 

Power Architecture ® e500 core performance leading 

to higher data rates and enabling increased number 

of users 






Single Chip Femto Base Station 

• Home Femtocell up to 8 users – BSC9130 

• SMB Femtocell up to 16 users – BSC9131 

Multi-standard Architecture 

• Standards support: LTE (Rel. 9), WCDMA (Rel. 

99/7/8) 

• LTE – 20 MHz single sector -100 Mbps / 

DL 50 Mbps UL 

• HSPA+ - 5 MHz single sector 42M bps / 

DL 11 Mbps UL 

• Multimode 

• Enabled with 2x2 MIMO 

• 2G/3G Sniffing and GPS Support 

SoC Architecture 

• e500 core, built on Power Architecture ® 

technology, subsystem (800 MHz – 1 GHz) 

• SC3850 core, built on StarCore technology, 

subsystem (800 MHz – 1 GHz) 

• MAPLE-B2F Baseband Accelerator Engine for 

LTE, WCDMA, CDMA2K and WiMAX 

technologies 

• Security engine - IPsec, Kasumi, Snow-3G 

• IEEE ® 1588 v2, NTP 

• 2x Ethernet RGMII and IEEE1588 v2 

• JESD 207 RF transceiver interface 

TM 

QorIQ Qonverge BSC9130 and BSC9131 Processors 

11 






BSC9131 Form Factor Reference Design 

Board 

• Features: 

− Complete communications platform enabling 

CDMA2K, LTE, WCDMA/HSPA+ 

− Dual-band system covering up to 2.7 GHz 

− Development and debugging tools available 

from Freescale and our partners 

• Benefits: 

− Form factor design helps speed customers 

time to market 

− Turn-key hardware design 

− Integrated with Maxim and ADI RF solutions 

TM 

12 






Aricent EPC 

& media server 

TM 

Femto BTS - 

BSC9131 RDB 

Complete hardware and software solution. Multi UE, OTA 

Come and see us in the tech lab. 

13 

2 commercial UEs 






• Single Chip Pico Base Station 

• Scalable platform - up to 64 users 

Multi-standard Architecture 

• Standards support: LTE (Rel. 9), WCDMA 

(Rel. 99/6/7/8), 802.16e 

• LTE – 20 MHz single sector -150 Mbps / 

DL 75 Mbps UL 

• HSPA+ throughputs: 5 MHz, Dual carrier 

42 Mbps DL / 11 Mbps UL 

• Multimode 

• Enabled with 2x4 MiMO 

• 2G/3G Sniffing and GPS Support 

SoC Architecture 

• Dual e500 cores, built on Power Architecture ® 

technology, subsystem (1 GHz to 1.2 GHz) 

• Dual SC3850 cores, built on StarCore 

technology, subsystems (1 GHz to 1.2 GHz) 

• MAPLE-B2P Baseband Accelerators Engine 

for LTE, WCDMA and WiMAX technologies 

• Security engine - IPsec, Kasumi, Snow-3G 

• IEEE®1588 v2, NTP 

• 4 SerDes lanes, combining: 

− 2x Ethernet SGMII 

− 2x CPRI v4.1 @ 6.144G antenna interface 

− 1x PCIe @ 5G x2 lanes 

• Quad JESD207 RF transceiver interfaces 

TM 

QorIQ Qonverge BSC9132 Processors 

14 






BSC9132 Development System 

• Features: 

− Complete communications platform 

enabling LTE, WCDMA/HSPA+ and 

WiMAX technologies 

− Dual-band system covering up to 2.7 GHz 

− Integrated Local and RRH (Remote Radio 

Head ) RF interfaces 

− Development and debugging tools 

available from Freescale and our partners 

• Benefits: 

− Faster time-to-market 

− Customizable development system for 

picocell solutions 

− Integrated with ADI RF solution 

TM 

15 






• Freescale will provide comprehensive and 

commercial L1, L2, L3 and transport 

software, integrated and tested on 

BSC9130/1/2 platforms 

− LTE-FDD/TDD and WCDMA (HSPA+) 

L1 software (licensed by Freescale) 

− L2/L3 Software for LTE-FDD/TDD and WCDMA 

(licensed by Aricent and CCPU/Radisys) 

− Transport software including IPsec, QoS backhaul, 

etc., through Freescale’s VortiQa Software 

(licensed by Freescale) 

− Development tools and operating system software 

(available through Freescale and its ecosystem partners) 

TM 

16 






Macro & C-RAN 

1000+ users 

LTE 1.8 Gbps 

8 x 8 MiMO 

WCDMA - 6 Cells 

Metro 

100 - 200+ Users 

LTE 600 Mbps 

4 x 4 MiMO 


Pico/Enterprise 

32 – 100 Users 

LTE 300 Mbps 

4 x 4 MiMO 


Home/SMB 

8 – 16 Users 

LTE 150 Mbps 

WCDMA – 1 cell 

2 x 2 MiMO 

P4080 

MSC8156 

MSC8157/8 

MSC8156 

MSC8157 

P2020 

MSC8154 

P1014 

MPC8313 

Production Execution Planning Proposal 

Available Now 2012 2013 2014 

TM 

P3041 

BSC9131 

BSC9130 

Pin Compatible Family 

Sample 

1Q 

Production 

BSC9132 

2Q 3Q 4Q 

17 

B4860 

B4420 

1Q 

NEW 

2Q 3Q 4Q 

Discrete – 45 nm 

SoC – 45 nm 

Pin Compatible Families 

Metro NG 

2Q 3Q 4Q 






1Q 

B4xxx 

Enterprise NG 

Femto NG 

Discrete – 28 nm SoC – 20 nm 

SoC – 28 nm

e6500 High-Performance MPU 

− 64-bit Power Architecture ® core 

− Dual threads provide x1.7 times 

the performance of a single 

thread 

Clustered L2 cache allowing strict 

allocation or full sharing 

− AltiVec 128b SIMD unit 

SC3900 High-Performance DSP 

− Step function in DSP 

performance over previous 

generation and competition 

− State-of-the-art support for 

control code with Branch 

Prediction 

− MMU and address translation 

support 

− Clustered L2 cache allowing 

strict allocation or full sharing 

High Speed Accesses to 

Memories 

Low Power Design 

TM 

High Speed 

Baseband 

Accelerators 

Interface 

SC3900 

FVP Core 

32K 

18 

SC3900 

FVP Core 

CoreNet Coherency Fabric 

Texas 

Instruments 

C66x 

1.5GHz 

32K 

32K 

32K 

2MB 16-way Shared L2 Cache, 

4 Banks 

CoreNet Interface 

256-bit Rd & Wr Data Busses 

20,030 

BDTi Score 

37,460 

Freescale 

SC3900 

1.2GHz 

BDTI 

Highest 

Speed 

Score 

BDTIsimMark2000 

BDTImark2000 

AltiVec 

T T 

e6500 

32K 

CoreNet Coherency Fabric 

2.4x 

AltiVec 

T T 

e6500 

*Based on simulation 






32K 

PMC 

32K 

Core Performance: CoreMark 

e500 core 

processor 

32K 

2MB 16-way Shared L2 Cache, 

4 Banks 

CoreNet Interface 

256-bit Rd & Wr Data Busses 

e6500* 

processor 

(2 thread) 

BDTI recently benchmarked the SC3900 core included in the 

Freescale B4860. Running at 1.2 GHz, the SC3900 core received 

a BDTIsimMark2000 score of 37,460 – the highest speed score 

recorded. See www.BDTI.com for details 

PMC 

Industry’s 

Highest 

CoreMark 

per Watt

Designed for Metrocell/Microcell Base Stations 

Complete high-performance QorIQ Qonverge portfolio of baseband SoCs 

scalable for femtocell up to macrocell base stations 

Fully Scalable Portfolio: Hardware scalability and software 

compatibility of the entire QorIQ Qonverge portfolio allows 

designers to retain R&D investments and accelerate time to market 

Rapid 4G Adoption: Combining high base station throughput and 

high user counts to provide low CAPEX and OPEX 

TM 

19 

High-Performance, Throughput and Capacity: By combining 

Power Architecture® e6500 cores and StarCore SC3900 DSP 

cores with ultra high-performance accelerators, designers can 

develop small base stations with high user density, low cost and 

low power 

Improved Spectral Efficiency: Through advanced MIMO 

receivers, interference cancelling support and carrier aggregation 






StarCore 

SC3900 FVP 

32 KB 

D-Cache 

• Next-generation, dual-thread e6500 Power Architecture ® cores offer highest CoreMark/watt with 

AltiVec SIMD technology for dramatic layer 2 scheduling acceleration 

− Industry-leading performance SC3900 StarCore provides 2x DSP performance compared to competitive offerings 

− Smart hardware acceleration for Layer 1, Layer 2, control and transport allows for best-in-class balance for the different 

processing layers, performance and cost 

• LTE, HSPA+ and LTE-Advanced simultaneous multi-mode support 

• Trusted system in unsupervised areas prevents running untrusted code and extraction of sensitive 

code or values 

• High-speed, industry-standard interfaces provide antenna, Wi-Fi chipset and backhaul glueless 

connectivity 

• Pin- and code-compatible with B4860 SoC, providing seamless hardware and software migration 

from macro to metro base stations 

TM 

32 KB 

I-Cache 

StarCore StarCore 

SC3900 FVP 

32 KB 

D-Cache 

2MB Banked L2 

MAPLE-B3 

6x RISCs 1x DEPE 

1x eTVPE 

5x eFTPE 

1x EQPE2 

1x PUPE2 

1x PDPE2 

1x ULB2 

1x ULF2 

1x TCPE 

1x CRPE 

2x CRCPE 

32 KB 

I-Cache 

T1 T2 

32 KB 

D-Cache 

Power 

e6500 

20 

32 KB 

I-Cache 

T1 T2 

32 KB 

D-Cache 

2MB Banked L2 

CoreNet Cache Coherency Switch Fabric 

4x CPRI 9.8G 

8x DMA 

PCIe x4 5G 

2.5G/1G 

FMAN 

Parse, 

Classify, 

Distribute 

iEEE®1588v 

2 

2.5G/1G 

2.5G/1G 

Security 

Engine 

5.3 

Queue 

Mgr. 

Buffer 

Mgr. 

8-Lanes 10G SERDES 

Power 

e6500 

32 KB 

I-Cache 

Real-Time Debug 

Watchpoint 

Cross Trigger 

Perf. Monitor 

Corenet Trace 

Aurora x2 

64-bit 

DDR3 

Memory 

Controller 

512KB 

CoreNet 

Platform 

Cache 

Pre-fetch 

USB 2.0 

Security Monitor 

IFC 

2x DUART 

4x I2C 

SD/MMC 

2x eSPI 

GPIOs 






StarCore 

SC3900 FVP 

32KB 

D-Cache 

32KB 

I-Cache 

StarCore StarCore 

SC3900 FVP 

32KB 

D-Cache 

2MB Banked L2 

MAPLE-B3 


1x eTVPE 

5x eFTPE 

1x EQPE2 

TM 

32KB 

I-Cache 

T1 T2 

Security acceleration for of over-the- 

32KB 

air and backhaul transport ciphering 

D-Cache 

1x PUPE2 

1x PDPE2 

1x ULB2 

1x ULF2 

1x TCPE 

1x CRPE 

2x CRCPE 

MAPLE-B 

Innovative layer 1 acceleration 

Power 

e6500 

32KB 

I-Cache 

T1 T2 

32KB 

D-Cache 

2MB Banked L2 

CoreNet - Cache Coherency Switch Fabric 

4x CPRI 9.8G 

PCIe x4 5G 

2.5G/1G 

FMAN 

IP packet acceleration 

Integrated vector processing unit 

for accelerating layer 2 scheduling 

8x DMA 

Parse, 

Classify, 

Distribute 

iEEE1588v2 

2.5G/1G 

2.5G/1G 

Security 

Engine 

5.3 

Queue 

Mgr. 

Buffer 

Mgr. 


Power 

e6500 

32KB 

I-Cache 

Real Time Debug 

Watchpoint 

Cross Trigger 

Perf. Monitor 

Corenet Trace 

Aurora x2 

Work distribution 

between cores and 

accelerators 

21 

DPAA Control/Transport Hardware Accelerators 

FMAN 

Frame Manager 

BMAN 

Buffer Manager 

64-bit 

DDR3 

Memory 

Controller 

QMAN 

Queue Manager 

Pre-fetch 

MAPLE-B Layer 1 Hardware Accelerators 

USB 2.0 

Standards support LTE, HSPA and LTE-Advanced 


IFC 

Throughputs 

4x I2C 

Very high throughputs enabling low 

processing latencies 

SD/MMC 

Programming 

eSPI 

multi-mode 

GPIOs 

Simple API 

LTE, LTE-A, WCDMA 

2x DUART 

operations 

Advanced MIMO 

Streaming 

Internal Embedded 

Flows 

7.5 Gbps aggregate throughput, 

parse, classify, distribute at smallest 

packet sizes 

Manages buffer pools for accelerators 

and network interfaces 

Simplified sharing of network 

interfaces and hardware accelerators 

512KB 

SEC CoreNet 

by multiple cores 

SNOW-3G, Kasumi, ZUC, IPSec, 

Platform 

Security Cache 

AES, DES, MD5, SHA-1/2…. 

Saving CPU cycles for higher value work 

Innovative MIMO equalizer for 

improved spectral efficiency and 

reduce processing latencies compared 

to conventional techniques 

Direct streaming to/from antenna 

without core intervention 

Internal embedded flows for 

PUSCH/PDSCH uplink/downlink 

processing without core intervention 

Completely offloads extensive baseband algorithms 






StarCore 

SC3900 FVP 

32KB 

D-Cache 

1x eTVPE 

5x eFTPE 

1x EQPE2 

Delivering line-rate StarCore StarCore at 

SC3900 FVP 

smallest packet sizes for 

backhaul networking 

32KB 

I-Cache 

32KB 

D-Cache 

2MB Banked L2 

MAPLE-B3 


1x PUPE2 

1x PDPE2 

1x ULB2 

1x ULF2 

1x TCPE 

1x CRPE 

2x CRCPE 

Standard, high speed 

antenna interfaces 

TM 

32KB 

I-Cache 

T1 T2 

32KB 

D-Cache 

Power 

e6500 

32KB 

I-Cache 

T1 T2 

32KB 

D-Cache 

2MB Banked L2 

CoreNet - Cache Coherency Switch Fabric 

4x CPRI 9.8G 

PCIe x4 5G 

8x DMA 

2.5G/1G 

FMAN 

Parse, 

Classify, 

Distribute 

iEEE1588v2 

2.5G/1G 

2.5G/1G 

Advanced real-time Power 

tracing and monitoring e6500 

Security 

Engine 

5.3 

Queue 

Mgr. 

Buffer 

Mgr. 


32KB 

I-Cache 

Real Time Debug 

Watchpoint 

Cross Trigger 

Perf. Monitor 

Corenet Trace 

Aurora x2 

22 

64-bit 

DDR3 

Memory 

Controller 

512KB 

CoreNet 

Platform 

Cache 

Pre-fetch 

USB 2.0 


IFC 

2x DUART 

4x I2C 

SD/MMC 

eSPI 

GPIOs 

PCIe for carrier-grade Wi-Fi 

chipset or for general-purpose 

connectivity 

Advanced I/O 

Glueless Interfaces to Antenna 

and Backhaul 

3x 1/2.5 GbE 

IEEE 1588v2 

4x CPRI v4.2 

PCIe v2.0 

IFC 

Other 

Peripherals 

Advanced 

Debug/Tracing 

7.5 Gbps of classify, parse 

and distribution with 

synchronization 

High-speed, industrystandard 

antenna interfaces 

at 9.8G 

Quad lane at 5G 

Modern NOR/NAND flash 

controller and legacy ASIC 

connectivity 

SPI, I2C, USB, UART, 

MMC, etc 

JTAG, Aurora (debug/trace) 






Dual-sector LTE or quad-cell HSPA 

with two major components 

CPRI 

Antenna 

Discrete System SoC System 

Layer-1 

Multicore 

DSP 

TM 

Layer-2/3 

Transport 

and Control 

Multicore 

MPU 

B4420 SoC 

23 

Dual-sector LTE or quad-cell HSPA 

with single SoC 

Antenna 

CPRI 

CPRI 

Flash DDR 

Flash 

B4420 

Technology Enablers 

• Leap in performance of Power Architecture ® and StarCore cores and accelerators 

• Use of advanced 28 nm process technology 

• Enables designers to meet performance, cost and power targets 

DDR 

3 






GE 

I2C 

UART 

SPI 

PHY 

PHY 

Back Haul 

1 Gbps 

1 Gbps 

Maint.

Industry Flagship for Performance, Power and Cost 

B4860 delivers the highest performance in the industry through intelligent, 

balanced integration with a focus on cost and power efficiency 

Optimal System Cost – industry-leading levels of 

integration, drastically reducing chip count and 

component cost 

Delivers on Scalability – a common architecture 

from femto to macro providing vertical and horizontal 

scalability; allows customers to leverage both 

software and hardware architectures 

TM 

24 

Performance Optimized – offering a leap in 

performance with efficient, high-performance next 

generation of our field proven DSP & MPU cores as 

well as enhanced application specific accelerators 

Power Efficiency – SoC solution allows for 

intelligent load balancing and power management 






• Next generation, e6500 Dual-Thread Power Architecture ® cores offer highest CoreMark/Watt with 

AltiVec technology for dramatic L2 scheduling acceleration 

− Next generation, SC3900 StarCore provides 2x DSP performance compared to competitive offerings 

− Above 21 GHz of programmable performance 

− Smart hardware acceleration for Layer 1, 2, Control and Transport allows for best in class performance, power and cost 

• Large scale SoC integration allows for simpler programming models and easier load balancing 

• Integrated, rich I/O including backhaul & antenna interfaces provides flexibility, interoperability and 

reduces overall system cost 

TM 

25 






Security acceleration for of overthe- 

air and backhaul transport 

ciphering 

MAPLE-B 

Innovative Layer-1 

Acceleration 

TM 

Integrated vector processing unit 

for accelerating layer 2 scheduling 

Work distribution 

between Cores and 

Accelerators 

IP Packets Acceleration 

26 

DPAA Control/Transport Hardware Accelerators 

FMAN 

Above 20 Gbps aggregate throughput, 

Frame Manager Parse, Classify, Distribute 

BMAN 

Manages buffer pools for accelerators 

Buffer Manager and network interfaces 

QMAN 

Queue Manager 

Simplified sharing of network 

interfaces and hardware accelerators 

by multiple cores 

RMAN 

Rapid IO Manager 

Seamless mapping sRIO to DPAA 

SEC 

SNOW-3G, Kasumi, ZUC, IPSec, 

Security 

AES, DES, MD5, SHA-1/2…. 

Saving CPU Cycles for higher value work 

MAPLE-B Layer-1 Hardware Accelerators 

Standards support 

LTE, WCDMA, WiMAX, GSM and 

LTE-Advanced 

Throughput 

Very high throughput enabling low 

processing latencies 

Programming Simple API 

Multimode operations LTE, LTE-A, WCDMA 

Innovative MIMO Equalizer for 

Advanced MIMO 

improved spectral efficiency and 

reduce processing latencies compared 

to conventional techniques 

Streaming 

Direct streaming to/from antenna 

without core intervention 

Internal Embedded 

Flows 

Internal embedded flows for 

PUSCH/PDSCH Uplink/Downlink 

processing without core intervention 

Completely offloads extensive Baseband algorithms 






Backhaul networking, 

delivering line-rate at 

smallest packet sizes 

Standard, high speed 

Antenna Interfaces 

TM 

Advanced Real-time 

Tracing and Monitoring 

sRIO & PCIe for multichip 

connectivity 

27 

Advance I/O – 

Glueless Interfaces to Antenna 

& Backhaul 

4x 1GbE/2.5GbE 

2x 10GbE 

IEEE1588v2 

8x CPRI v4.2 

2x sRIO V2.1 

PCIe v2.0 

IFC 

Other 

Peripherals 

Advanced 

Debug/Tracing 

Classify-Parse-Distribute 

with Synchronization 

High-speed, industrystandard 

Antenna 

Interfaces at 9.8G 

2 controllers with 8 lanes 

5G 

Quad lanes at 5G 

Modern NOR/NAND flash 

controller & Legacy ASIC 

connectivity 

SPI, I2C, USB, UART, 

MMC, etc 

JTAG, Aurora (debug/trace) 






LTE SOLUTION 

Base station on a chip 

20 MHz, 3-sector, 24 Ant. 

1.4 Gbps aggregated throughput 

WCDMA SOLUTION 


5 MHz, up to 6 cells, 24 ant. 

384 Mbps aggregated throughput 

• Industry-leading performance solution for base stations 

• Based on advanced Power Architecture ® , StarCore, CoreNet and MAPLE 

technologies 

• First SoC in 28 nm technology node for Wireless Infrastructure 

• Supports the most advanced mobile wireless standards 

TM 

High Density Baseband Solution 

Supports 

Macrocells 

Supports multiple 

Radio Access 

Technologies 

Supports LTE, 

LTE-A, WCDMA, 

TD-SCDMA, GSM 

Multi-mode 

Support 

28 

LTE-Advanced SOLUTION 

A sector on a chip 

up to 60 MHz, 1-sector, 16 Ant. 

1.8 Gbps aggregated throughput 

TD-SCDMA SOLUTION 


36 carriers with a single device 






3 sector, 20 MHz LTE 

with 5 major components 

Antenna 

CPRI 

Layer-1 

DSP 

DSP 

DSP 

TM 

sRIO 

Switch 

Layer-2/3 

Transport 

& Control 

Multicor 

e 

MPU 

POWER 

B4860 SoC 

4X Cost Reduction 

3X Power Reduction 

29 

3 sectors, 20 MHz LTE, or 

Single sector 60 MHz LTE-A 

on a single SoC 

Antenna 

I2C 

UART 

SPI 

Flas 

h 

Flas 

h 

CPRI 

B4860 






GE 

sRIO 

CPRI 

DDR2 DDR1 

DDR 

3 

DDR3 

PHY 

PHY 

Back Haul 

10 Gbps 

1Gbps 

Maint.

Tools and 

Operating Systems 

TM 

Application 

Software 

Hardware 

Partners 

30 

Systems 

Integration & Services 

Development 

Tools 






B4860 SoC -Telecom LTE Awards 2012 Winner 

Freescale beat a tough competitive line up to win …. 

Telecoms LTE Awards 2012 Shortlist 

Category 10 Best Chipset / Processor Product 

Freescale Semiconductor - B4860 SoC (Infrastructure) 

GCT Semiconductor - GDM7240 (Handset) 

Renesas Mobile Corporation - MP5232 (Handset) 

Texas Instruments - TCI6636 SoC (Infrastructure) 

TM 

31 






BSC9131 Femto 

• 8 to 16 users 

(LTE (FDD, TDD), WCDMA, 

CDMAx) and multi-mode 

TM 

BSC9132 Pico 

• 32 to 100 users 

(LTE (FDD, TDD), WCDMA) 

and multi-mode 

B4860 Macro 

• >1000 users 

• Multi-sector, Multistandard 

and multi-mode 

• 3GPP Rel. 10 

45 nm 28 nm 

32 

B4420 Metro 

• 128 to 256 users 

• Multi-standard and multimode, 

1 - 2 sectors 

• 3GPP Rel. 10 

• Pin compatible with B4860 






TM 

Freescale on Kaixin 

Tag yourself in photos 

and upload your own! 

Session materials will be posted @ www.freescale.com/FTF 

33 

Weibo? 

Please use hashtag 

#FTF2012#

QorIQ Qonverge Base Station SoC Roadmap Update

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