Sieve of Eratosthenes benchmarks for the Z8 FORTH microcontroller

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APPENDIX C 'Ihis section defines the FORTH words required in the optimization of the outer loop of the FORTH benchmark for the sieve algorithm discussed in Section 6. The W Q ~ used S in the outer loop optimization make use of locations 60 through 69 of the 28 register file. Register Fi le Address Description of Definition 60/61 Prime count 62/63 1nCk.X 54/65 Array size (SIZE) 66/67 Address of the FLAGS array 68/69 LIMIT (Used to limit duplicate markings of nonprimes) : do-codp 62 R POP, 63 R POP, Initialize starting value of index 64 SIZE-ADDR LOAD-WORD, Copy of array size to register file 66 FLAGS LOAD-WORD, Copy of FLAGS addr to register file 68 R INCW, do, ; Increment SIZE to do SIZE+l iterations : LTBAI R9 63 RR LD. Copy of INDEX to working register 8/9 R8 62 RR LD, R9 67 RR ADD, 88 66 RR ADC, R10 R8 LDC, R10 R10 rr OR, ; Add FLAGS address to Index Load R10 via pointer at R8/9 Set condition codes in Z8 flag register : Lirnit>i:if, 68 62 RR CP, Test LIMIT > INDEX le if, If LIMIT < INDEX skip out ecl if, IF LIMIT(H)=INDEX(H) test Low byte 69 63 RR CP, Test low bytes ult if, SWAP then, if LIPBIT(L)
: LOAD-WRD OVER 1+ OVER 0 100 U/ RR LO, DROP FF AND RR LK, ; : ZERO-UORD DUP 1+ R CLR, R CLR , ; : GOFORTN FJND RO R DECU, RO R3 STC, RO R DECW, RO R2 STC, HERE 12 4 a d 3COD OR, HERE 10 + 0 100 U/ SUAP 2600 OR , DROP DUP FF and 5COO OR , 0 100 U/ 4COO OR , DROP R6 R4 LDC, R4 R INCW, R7 R4 LDC, R4 R INCU, R6 EXIT, HERE a + , HERE a + , R2 RO LDC, RO R lNCU, R3 RO LDC, RO R INCU, Address of target FORTH word to stack Save R2/R3 on RSteck R3 to RStack (via RO) R2 to RStack (via RO) Lou byte of HERE+12 to R3 High byte of HERE+IO to R2 Low byte of target addr to R5 High byte of target addr to R6 Load jwp addr to R6/7 Jwp to target addr via R6/7 IP and EV to return to prior routine Restore IP : SQRT DUP 8000 AND IF NEGATE THEN 60 5 0 DO OVER OVER / + 2 / LOOP SWAP DROP ; 25
Page 1 and 2: I hlAH IIN MARlElTA ENERG< SYSTEMS
Page 3: Energy Division SEVE OF ERATOSTHENE
Page 7: . TABLEOFCONTENTS 1 . INTRODUCTION
Page 11 and 12: 1. 1NTRODUCTION The Oak Ridge Natio
Page 13 and 14: Smart House can be thought of as th
Page 15 and 16: detailed remarks for each of the FO
Page 17 and 18: 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11.
Page 19 and 20: 5. THE GILBREATHS’ FORTH PROGRAM
Page 21 and 22: 1. 2. 3. 4. 5. 6. 7. 8. 9. IO. 11.
Page 23 and 24: 6. IMPROVING THE EFFICIENCY OF THE
Page 25 and 26: 7. IMPROVING THE EFFICIENCY OF THE
Page 27 and 28: 8. ELIMINATING DUPLICATE MARKING OF
Page 29 and 30: The time to perform ten iterations
Page 31 and 32: 10. REFERENCES Brodie, L., Starting
Page 33: APPENDIX B IMPLEMENTATION OF ROW-FI

Sieve of Eratosthenes benchmarks for the Z8 FORTH microcontroller

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