Getting Started with QNX Neutrino - QNX Software Systems

Neutrino and interrupts
© 2009, QNX Software Systems GmbH & Co. KG.
END
clear source of interrupt
IF thread required to do some work THEN
RETURN (event);
ELSE
RETURN (NULL);
ENDIF
The trick is to return an event (of type struct sigevent, which we talked about in
the Clocks, Timers, and Getting a Kick Every So Often chapter) instead of NULL.
Note that the event that you return must be persistent after the stack frame of the ISR
has been destroyed. This means that the event must be declared outside of the ISR, or
be passed in from a persistent data area using the area parameter to the ISR, or
declared as a static within the ISR itself. Your choice. If you return an event, the
kernel delivers it to a thread when your ISR returns. Because the event “alerts” a
thread (via a pulse, as we talked about in the Message Passing chapter, or via a signal),
this can cause the kernel to reschedule the thread that gets the CPU next. If you return
NULL from the ISR, then the kernel knows that nothing special needs to be done at
thread time, so it won’t reschedule any threads — the thread that was running at the
time that the ISR preempted it resumes running.
Level-sensitivity versus edge-sensitivity
There’s one more piece of the puzzle we’ve been missing. Most PICs can be
programmed to operate in level-sensitive or edge-sensitive mode.
In level-sensitive mode, the interrupt line is deemed to be asserted by the PIC while
it’s in the “on” state. (This corresponds to label “1” in the diagram below.)
Time
Hardware interrupt
request line
1 2 3 2 3 2 3
ISR x
Level-sensitive interrupt assertion.
We can see that this would cause the problem described above with the floppy
controller example. Whenever the ISR finishes, the kernel tells the PIC, “Okay, I’ve
handled this interrupt. Tell me the next time that it gets activated” (step 2 in the
diagram). In technical terms, the kernel sends an End Of Interrupt (EOI) to the PIC.
The PIC looks at the interrupt line and if it’s still active would immediately
re-interrupt the kernel (step 3).
We could get around this by programming the PIC into edge-sensitive mode. In this
mode, the interrupt is noticed by the PIC only on an active-going edge.
172 Chapter 4 • Interrupts April 30, 2009