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Bit and Byte Interleaving Chapter 3 - CHRISTI - Christiealwis.com

Bit and Byte Interleaving Chapter 3 - CHRISTI - Christiealwis.com

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<strong>Chapter</strong> 3<br />

<strong>Bit</strong> <strong>and</strong> <strong>Byte</strong> <strong>Interleaving</strong><br />

3.1 <strong>Interleaving</strong> Methods<br />

In digital transmission a voice sample is converted to 8 binary bits. These bits will be sent<br />

in 3.9us to the other end through the transmission media if the multiplexing used is CEPT<br />

(Committee of European Post <strong>and</strong> Tele<strong>com</strong>). Is it necessary to send these 8 bits in serial<br />

in 3.9us. Other wise if we use 8 media in 488ns the sample information will be received<br />

at the other end. The latter method is not used due to the following reasons.<br />

1. Instead of one transmission media 8 transmission media to be used. Hence cost is<br />

high.<br />

2. Even 8 transmission medias deployed it will not have similar characteristics for the<br />

buts in transmission. Leading the receiver to deploy additional techniques to<br />

synchronize the bits for a word. Here a word means a sample information of 8 bits.<br />

Hence in the basic PCM of 2.048 Mbps always 8 bits pertaining to sample<br />

information is sent serially. Since there are 32 Time Slots (30 channels are<br />

multiplexed in the CEPT system) . All the bits pertaining to a sample are serially<br />

interleaved <strong>and</strong> sent in one transmission media. But when a multiplexing is carried<br />

out in the higher order the basic information to the higher order multiplexer is a bit<br />

pertaining to a primary tributary of 488ns <strong>and</strong> not 8 bits pertaining to a sample. Two<br />

interleaving methods can be adopted. They are as follows<br />

1. <strong>Bit</strong> <strong>Interleaving</strong>- As explained earlier four bits of 4 primary tributaries are<br />

multiplexed together as one time slot on the higher tributary. This is shown as<br />

follows.<br />

P 0<br />

Time Shrinking for<br />

4 bits<br />

Time exp<strong>and</strong>ing for<br />

4 bits<br />

P 1<br />

t=0<br />

t=0<br />

P 2<br />

t=122ns<br />

R 1<br />

R 2<br />

t=122ns<br />

P 3<br />

t=244ns<br />

t=488ns<br />

1 0 1 1<br />

488ns<br />

t=244ns<br />

t=488ns<br />

Scanning (a moment is enough to identify whether<br />

there is a bit or not)<br />

For <strong>com</strong>plete<br />

details<br />

P 3 P 2 P 1 P 0<br />

……… P 3 P 2 P 1 P 0<br />

P 3 P 2 P 1 P 0<br />

TS31<br />

TS1<br />

Figure: 3.1<br />

TS0<br />

7


2. Word (<strong>Byte</strong>) <strong>Interleaving</strong>- In this method the scanning of each bit is similar to<br />

above while transmission on the higher order PCM, all these scanned primary<br />

information for a particular Time Slot of Primary tributary will be stored <strong>and</strong> sent<br />

serially in the higher order PCM as one time slot but not in 3.9us. In the case of<br />

8.448 Mbps this time slot will carry 8 bits in 117*8 = 936ns.<br />

In the practical situation <strong>Bit</strong> <strong>Interleaving</strong> deployed due to treatment of practical<br />

primary PCMs non alignment of clocks <strong>and</strong> will be discussed in detail. While the<br />

word <strong>Interleaving</strong> is deployed in circuit switching systems where all the primary<br />

PCMs to the switching network is synchronized. It should be bear in the mind for<br />

Synchronous Digital Hierarchy word interleaving is used <strong>and</strong> is further discussed<br />

under SHD section.<br />

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