Digital Circuit And Logic Design I
Digital Circuit And Logic Design I
Digital Circuit And Logic Design I
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<strong>Digital</strong> <strong>Circuit</strong> <strong>And</strong> <strong>Logic</strong><br />
<strong>Design</strong> I<br />
Lecture 1<br />
Outline<br />
• Introduction<br />
1. Course characteristics<br />
2. <strong>Digital</strong> system versus Analog system<br />
3. <strong>Digital</strong> devices<br />
4. Integrated <strong>Circuit</strong> (IC)<br />
• Number Systems and Codes (1)<br />
1. Number system and conversion<br />
2. Addition and subtraction<br />
3. Representation of negative numbers<br />
Panupong Sornkhom, 2005/2 2<br />
1
Introduction<br />
1. Course characteristic<br />
• Instructor<br />
• Course description<br />
• Course objectives<br />
• Recommended text books<br />
• Course schedule<br />
• Evaluation<br />
• Agreements<br />
Panupong Sornkhom, 2005/2 4<br />
2
Instructor<br />
Panupong Sornkhom<br />
Department of Electrical and Computer Engineering<br />
Faculty of Engineering<br />
Naresuan University<br />
Office room EE213<br />
Office hours Monday 13.00 – 14.00<br />
Saturday 10.00 – 12.00<br />
Telephone 01-2830195<br />
Website<br />
http://www.panupong.url40.net<br />
Email<br />
panupongsk@hotmail.com<br />
Panupong Sornkhom, 2005/2 5<br />
Course description<br />
ทฤษฎีเบื้องตนของวงจรสวิทชิ่ง พีชคณิตแบบบูลลีน รหัสคอมพิวเตอร การตรวจสอบ<br />
ความผิดพลาด ตารางความจริง วิธีลดรูปสมการแบบบูลลีน และ วงจรตรรกะชนิด<br />
ตาง ๆ มัลติเพลกเซอร ดีมัลติเพลกเซอร วงจรเขารหัสและถอดรหัส วงจรบวกลบ<br />
วงจรเชิงลําดับ ฟลิปฟลอบ วงจรนับ เรจิสเตอร<br />
Panupong Sornkhom, 2005/2 6<br />
3
Course objectives<br />
• Understand process of digital system design<br />
• Understand Boolean algebra and<br />
minimization method<br />
• Can design and implement digital system<br />
using combinational circuit and sequential<br />
circuit<br />
Panupong Sornkhom, 2005/2 7<br />
Recommended text books<br />
1. John Wakerly, <strong>Digital</strong> <strong>Design</strong> Principles and<br />
Practices, Third edition, Prentice Hall.<br />
2. Sajjan Shjiva, Introduction to <strong>Logic</strong> <strong>Design</strong>,<br />
Second edition, Macel Dekker.<br />
3. Kenneth Breeding, <strong>Digital</strong> <strong>Design</strong><br />
Fundamentals, Second edition, Prentice Hall.<br />
4. Randy Katz, Contemporary logic design,<br />
Addison Wesley.<br />
Panupong Sornkhom, 2005/2 8<br />
4
Course schedule<br />
Week<br />
1<br />
2<br />
3<br />
4<br />
5<br />
6<br />
7<br />
8<br />
Topic<br />
Introduction + Number system and Codes (1)<br />
Number system and Codes (2)<br />
Combinational logic design principles (1)<br />
Combinational logic design principles (2)<br />
Combinational logic design example<br />
Multiplexer, Demultiplexer, Encoder, and Decoder<br />
Arithmetic circuits<br />
Midterm exam<br />
HW01 announced<br />
HW01 due<br />
HW02 announced<br />
HW02 due<br />
Quiz01<br />
HW03 announced<br />
HW03 due<br />
HW04 announced<br />
HW04 due<br />
Quiz02<br />
HW05 announce<br />
HW05 due<br />
HW06 announce<br />
HW06 due<br />
Quiz03<br />
Note<br />
Panupong Sornkhom, 2005/2 9<br />
Course schedule (cont.)<br />
Week<br />
Topic<br />
Sequential logic design principles (1)<br />
9<br />
Sequential logic design principles (2)<br />
10<br />
Sequential circuit design example<br />
11<br />
Counters<br />
12<br />
Registers<br />
13<br />
Term projects presentation<br />
14<br />
Term projects presentation<br />
15<br />
16 Final exam<br />
HW07 announced<br />
Term project announced<br />
HW07 due<br />
HW08 announce<br />
HW08 due<br />
Quiz04<br />
HW09 announced<br />
HW09 due<br />
HW10 announced<br />
HW10 due<br />
Quiz05<br />
HW11 announced<br />
HW11 due<br />
HW12 announce<br />
HW12 due<br />
Quiz06<br />
Term project due<br />
Note<br />
Panupong Sornkhom, 2005/2 10<br />
5
Evaluation<br />
• Score weighting<br />
Quiz/Homework 20%<br />
Midterm exam 20%<br />
Final exam 30%<br />
Term project 15%<br />
Laboratory 15%<br />
• Grading policies<br />
< 40% F<br />
>= 40% grading by statistical distribution<br />
Panupong Sornkhom, 2005/2 11<br />
Agreements<br />
• การสงงานตองสงกับผูสอนโดยตรงในชั้นเรียน หรือ ที่หองทํางานของ<br />
ผูสอนเทานั้น<br />
สงงานชา 5 นาที ตัดคะแนน 10% ของคะแนนเต็มของงานนั้น<br />
สงงานชาเกินกวา 5 นาที แตไมเกิน 1 วัน ตัดคะแนน 20% ของคะแนนเต็ม<br />
ของงานนั้น<br />
สงงานชาเกินกวา 1 วัน แตไมเกิน 1 สัปดาห ตัดคะแนน 50% ของคะแนน<br />
เต็มของงานนั้น<br />
Panupong Sornkhom, 2005/2 12<br />
6
Agreements (cont.)<br />
• งานทุกชิ้น จะตองทําดวยตนเองเทานั้น หากเปนงานที่ตองมีการคนควาและ<br />
เรียบเรียงขอมูลตองระบุเอกสารอางอิงทุกครั้ง<br />
ถาพบวามีการลอกกันครั้งแรก จะปรับคะแนนของงานนั้นทั้งหมดเปนศูนย และ<br />
ผูสอนจะแจงใหทราบ<br />
ถาพบวามีการลอกกันครั้งที่สอง จะปรับตกในรายวิชานี้ทันที และ ผูสอนจะแจงให<br />
ทราบ<br />
Panupong Sornkhom, 2005/2 13<br />
Agreements (cont.)<br />
• ในการสอบ ทั้งสอบยอย สอบกลางภาค และ สอบปลายภาค จะตองไมมีการทุจริตสอบ<br />
ซึ่งพฤติกรรมตอไปนี้จะถือวาทุจริตสอบ<br />
ชําเลืองมองคําตอบผูอื่นหรือปรึกษากัน<br />
มีบันทึกเนื้อหาของรายวิชาไมวาจะในรูปแบบใด ๆ อยูกับตัวในขณะสอบ โดยไมไดรับอนุญาต<br />
ใชเครื่องมือสื่อสารขณะสอบ<br />
ลุกออกจากที่นั่งขณะทําการสอบ<br />
ละเมิดกฏ/ขอปฏิบัติในการสอบ ตามประกาศของมหาวิทยาลัย<br />
• หากพบการทุจริตในระหวางการสอบ ปรับตกในรายวิชานี้ทันที และสงเรื่องใหทางคณะ<br />
พิจารณาโทษ<br />
• หากตรวจพบการทุจริตในระหวางการตรวจขอสอบ ผูสอนจะทําการสอบสวนและหาก<br />
พบวามีการทุจริตจริง ปรับตกในรายวิชานี้ทันที และสงเรื่องใหทางคณะพิจารณาโทษ<br />
Panupong Sornkhom, 2005/2 14<br />
7
Agreements (cont.)<br />
• เมื่อมีการประกาศคะแนนหรือเกรด หากพบวามีขอผิดพลาดในการให<br />
คะแนนหรือเกรด สามารถมาตรวจสอบไดกับผูสอนภายใน 3 วันหลังจาก<br />
ประกาศ หลังจากนี้จะถือวาคะแนนหรือเกรดนั้นเปนที่ยอมรับและจะไมมี<br />
การแกไขใด ๆ อีก<br />
Panupong Sornkhom, 2005/2 15<br />
2. <strong>Digital</strong> system versus Analog system<br />
• Definition<br />
Analog system <br />
process continuous<br />
range signal<br />
<strong>Digital</strong> system <br />
process discrete<br />
value signal<br />
value<br />
time<br />
Panupong Sornkhom, 2005/2 16<br />
8
2. <strong>Digital</strong> system versus Analog system<br />
(cont.)<br />
• Applications<br />
Still picture recording<br />
Audio/Video recording<br />
Telephone system<br />
Panupong Sornkhom, 2005/2 17<br />
2. <strong>Digital</strong> system versus Analog system<br />
(cont.)<br />
• Why every products becoming digital<br />
Flexibility<br />
Reliability<br />
Speed<br />
Cost<br />
Panupong Sornkhom, 2005/2 18<br />
9
3. <strong>Digital</strong> devices<br />
• <strong>Logic</strong> gates<br />
<br />
<br />
<br />
<br />
<br />
<br />
AND gate<br />
OR gate<br />
NOT gate<br />
NAND gate<br />
NOR gate<br />
XOR gate<br />
Panupong Sornkhom, 2005/2 19<br />
3. <strong>Digital</strong> devices (cont.)<br />
• Flip-flops<br />
<br />
<br />
<br />
D flip-flop<br />
JK flip-flop<br />
RS flip-flop<br />
SET<br />
SET<br />
SET<br />
D Q<br />
J Q<br />
S Q<br />
CLR Q<br />
K CLR Q<br />
R CLR Q<br />
D flip-flop JK flip-flop RS flip-flop<br />
Panupong Sornkhom, 2005/2 20<br />
10
4. Integrated <strong>Circuit</strong><br />
• Integrated <strong>Circuit</strong> (IC) A collection of one<br />
or more gates fabricated on a single silicon<br />
chip<br />
* Picture from http://www.tiscali.co.uk/reference/encyclopaedia/hutchinson/m0030289.html<br />
Panupong Sornkhom, 2005/2 21<br />
4. Integrated <strong>Circuit</strong> (cont.)<br />
• Scales of IC<br />
<br />
<br />
Small-scale integration<br />
(SSI)<br />
• 1-20 gates<br />
• Basic building block<br />
(gates, flip-flop)<br />
Medium-scale integration<br />
(MSI)<br />
• 20 – 200 gates<br />
• Functional building block<br />
(decoder, register ,<br />
counter)<br />
<br />
<br />
Large-scale integration<br />
(LSI)<br />
• 200 – 200,000 gates or<br />
more<br />
• Small memories,<br />
microprocessors,<br />
programmable logic<br />
devices (PLD), custom<br />
devices<br />
Very large-scale<br />
integration (VLSI)<br />
• More than 1,000,000<br />
transistors<br />
Panupong Sornkhom, 2005/2 22<br />
11
Number system and Codes<br />
(1)<br />
1. Number system and conversion<br />
• Positional number system<br />
Each digit position has weight<br />
Value = weighted sum of all digits<br />
For example, 2457 = 2x1000+4x100+5x10+7x1<br />
623.57 = 6x100+2x10+3x1+5x0.1+7x0.01<br />
In general, a number D of the form d 1<br />
d 0<br />
.d -1<br />
d -2<br />
has<br />
the value D = d 1<br />
x10 1 +d 0<br />
x10 0 +d -1<br />
x10 -1 +d -2<br />
x10 -2<br />
In this case, 10 is called base or radix of the<br />
number system<br />
Panupong Sornkhom, 2005/2 24<br />
12
1. Number system and conversion<br />
(cont.)<br />
• Positional number system (cont.)<br />
In general positional number system, the radix is<br />
an integer r ≥ 2, and the digit in position i has<br />
weight r i<br />
The general form is d p-1<br />
d p-2<br />
…d 1<br />
d 0<br />
.d -1<br />
d -2<br />
…d -n<br />
where there are p digits to the left of the point and<br />
n digits to the right of the point, called radix point<br />
The value of the number is the sum of each digit<br />
multiplied by the corresponding power of the radix<br />
Panupong Sornkhom, 2005/2 25<br />
1. Number system and conversion<br />
(cont.)<br />
• Positional number system (cont.)<br />
The leftmost digit in such a number is called the<br />
high-order or most significant digit; the rightmost<br />
is the low-order or least significant digit.<br />
<strong>Digital</strong> circuits have signals that are normally in<br />
one of only two conditions – low or high, off or on.<br />
The signals in these circuits are interpreted to<br />
represent binary digits (or bits) that have one of<br />
two values. Thus, the binary radix is normally<br />
used to represent numbers in a digital system<br />
Panupong Sornkhom, 2005/2 26<br />
13
1. Number system and conversion<br />
(cont.)<br />
• Positional number system (cont.)<br />
The leftmost bit of a binary number is called the<br />
high-order or most significant bit (MSB); the<br />
rightmost is the low-order or least significant bit<br />
(LSB).<br />
Radix 10 use it in everyday business<br />
Radix 2 use it in digital system<br />
Other radices may be used in other purposes for<br />
example radices 8 and 16 used for shorthand<br />
representation of multibit numbers<br />
Panupong Sornkhom, 2005/2 27<br />
1. Number system and conversion<br />
(cont.)<br />
• Positional number system (cont.)<br />
Decimal<br />
Binary<br />
Octal<br />
Hexadecimal<br />
Decimal<br />
Binary<br />
Octal<br />
Hexadecimal<br />
0<br />
0<br />
0<br />
0<br />
8<br />
1000<br />
10<br />
8<br />
1<br />
1<br />
1<br />
1<br />
9<br />
1001<br />
11<br />
9<br />
2<br />
10<br />
2<br />
2<br />
10<br />
1010<br />
12<br />
A<br />
3<br />
11<br />
3<br />
3<br />
11<br />
1011<br />
13<br />
B<br />
4<br />
100<br />
4<br />
4<br />
12<br />
1100<br />
14<br />
C<br />
5<br />
101<br />
5<br />
5<br />
13<br />
1101<br />
15<br />
D<br />
6<br />
110<br />
6<br />
6<br />
14<br />
1110<br />
16<br />
E<br />
7<br />
111<br />
7<br />
7<br />
15<br />
1111<br />
17<br />
F<br />
Panupong Sornkhom, 2005/2 28<br />
14
1. Number system and conversion<br />
(cont.)<br />
• Conversions<br />
<br />
Convert from radix r to decimal value<br />
p−1<br />
∑<br />
D= d ⋅r<br />
i=−n<br />
i<br />
i<br />
<br />
Convert from decimal value (integer) to radix r<br />
• Divide the value D by r the remainder is least significant<br />
digit in radix r number and the quotient will be divided by r<br />
again<br />
• We collect all remainder as digit in radix r number<br />
• The last remainder is most significant digit<br />
Panupong Sornkhom, 2005/2 29<br />
1. Number system and conversion<br />
(cont.)<br />
• Conversions (cont.)<br />
<br />
Convert from decimal fraction to radix r<br />
• Multiply D by r then collect the integer part of result as a digit of<br />
answer and repeatedly multiply fraction part of result by r<br />
• a terminating fraction in one base may not terminate in another<br />
Panupong Sornkhom, 2005/2 30<br />
15
1. Number system and conversion<br />
(cont.)<br />
• Conversions (cont.)<br />
<br />
Example<br />
• Convert 179 10 to binary number<br />
179/2 = 89 remainder 1 (LSB)<br />
89/2 = 44 remainder 1<br />
44/2 = 22 remainder 0<br />
22/2 = 11 remainder 0<br />
11/2 = 5 remainder 1<br />
5/2 = 2 remainder 1<br />
2/2 = 1 remainder 0<br />
1/2 = 0 remainder 1 (MSB)<br />
Thus 179 10<br />
= 10110011 2<br />
Panupong Sornkhom, 2005/2 31<br />
1. Number system and conversion<br />
(cont.)<br />
• Conversions (cont.)<br />
<br />
0.512 x 8 = 4.096<br />
• Convert 0.132 10 to octal<br />
Example<br />
number<br />
0.132 x 8 = 1.056<br />
• Convert 467 10 to octal<br />
0.056 x 8 = 0.448<br />
number<br />
0.448 x 8 = 3.584<br />
467/8 = 58 remainder 3<br />
0.584 x 8 = 4.672<br />
(Least significant digit)<br />
0.672 x 8 = 5.376<br />
58/8 = 7 remainder 2<br />
0.376 x 8 = 3.008<br />
7/8 = 0 remainder 7<br />
0.008 x 8 = 0.064<br />
(Most significant digit)<br />
0.064 x 8 = 0.512<br />
Thus 467 10<br />
= 723 8<br />
….<br />
Thus 0.132 10<br />
=<br />
0.103453004… 8<br />
Panupong Sornkhom, 2005/2 32<br />
16
2. Addition and Subtraction<br />
• Concept<br />
<br />
Addition and subtraction of nondecimal numbers by hand<br />
uses the same technique that we use in decimal numbers<br />
• Addition uses carry in and carry out<br />
Carry<br />
in<br />
X<br />
Y<br />
Sum<br />
Carry<br />
out<br />
Carry<br />
in<br />
X<br />
Y<br />
Sum<br />
Carry<br />
out<br />
0<br />
0<br />
0<br />
0<br />
0<br />
1<br />
0<br />
0<br />
1<br />
0<br />
0<br />
0<br />
1<br />
1<br />
0<br />
1<br />
0<br />
1<br />
0<br />
1<br />
0<br />
1<br />
0<br />
1<br />
0<br />
1<br />
1<br />
0<br />
0<br />
1<br />
0<br />
1<br />
1<br />
0<br />
1<br />
1<br />
1<br />
1<br />
1<br />
1<br />
Addition table including carries<br />
Panupong Sornkhom, 2005/2 33<br />
2. Addition and Subtraction<br />
• Concept (cont.)<br />
<br />
4 bit adder<br />
Panupong Sornkhom, 2005/2 34<br />
17
2. Addition and Subtraction (cont.)<br />
• Concept (cont.)<br />
• Subtraction uses borrow in and borrow out<br />
Borrow<br />
in<br />
X<br />
Y<br />
Diff<br />
Borrow<br />
out<br />
Borrow<br />
in<br />
X<br />
Y<br />
Diff<br />
Borrow<br />
out<br />
0<br />
0<br />
0<br />
0<br />
0<br />
1<br />
0<br />
0<br />
1<br />
1<br />
0<br />
0<br />
1<br />
1<br />
1<br />
1<br />
0<br />
1<br />
0<br />
1<br />
0<br />
1<br />
0<br />
1<br />
0<br />
1<br />
1<br />
0<br />
0<br />
0<br />
0<br />
1<br />
1<br />
0<br />
0<br />
1<br />
1<br />
1<br />
1<br />
1<br />
Subtraction table including borrows<br />
Panupong Sornkhom, 2005/2 35<br />
2. Addition and Subtraction<br />
• Concept (cont.)<br />
<br />
4 bit subtracter<br />
Panupong Sornkhom, 2005/2 36<br />
18
2. Addition and Subtraction (cont.)<br />
• Example<br />
Panupong Sornkhom, 2005/2 37<br />
3. Representation of negative numbers<br />
• Signed-Magnitude representation<br />
<br />
<br />
<br />
Using extra bit position (MSB) to represent the sign<br />
• 0 = plus (+)<br />
• 1 = minus (-)<br />
The rest bits represent magnitude of the number<br />
n-bit signed-magnitude system represent number from<br />
–(2 n-1 -1) to +(2 n-1 -1) and there are two possible<br />
representations of zero.<br />
Panupong Sornkhom, 2005/2 38<br />
19
3. Representation of negative numbers<br />
(cont.)<br />
• Signed-Magnitude representation (cont.)<br />
<br />
<br />
<br />
The sign and magnitude portions are handled separately in<br />
arithmetic using signed-magnitude number.<br />
Signed-magnitude addition<br />
• If the signs are the same, add the magnitude and give the<br />
result the same sign<br />
• Else compare the magnitude, subtract the smaller from the<br />
larger and give the result the sign of the larger<br />
Signed-magnitude subtraction<br />
• Change the sign of the subtrahend and pass it to adder<br />
Panupong Sornkhom, 2005/2 39<br />
3. Representation of negative numbers<br />
(cont.)<br />
• Complement number systems<br />
<br />
<br />
Radix-complement representation<br />
• The radix-complement of n-digit number N in radix r<br />
-N = r n –N<br />
Decimal number Ten’s complement<br />
Binary number Two’s complement<br />
Diminished radix-complement representation<br />
• The diminished radix-complement of n-digit number N in radix r<br />
-N = r n -N–1<br />
Decimal number Nine’s complement<br />
Binary number One’s complement<br />
Panupong Sornkhom, 2005/2 40<br />
20
3. Representation of negative numbers<br />
(cont.)<br />
• Complement number systems (cont.)<br />
<br />
Two’s complement<br />
• Complement of n-bit number N in two’s complement is<br />
computed by using the method below<br />
Complement each bit (change 0 to 1 and 1 to 0)<br />
Then add 1 to the LSB<br />
• The MSB of a number represents sign bit<br />
0 = plus<br />
1 = minus<br />
• n-bit two’s-complement system represent number from –(2 n-1 )<br />
to +(2 n-1 -1) and there are only one representation of zero<br />
(positive zero)<br />
Panupong Sornkhom, 2005/2 41<br />
3. Representation of negative numbers<br />
(cont.)<br />
• Complement number systems (cont.)<br />
<br />
Two’s complement (cont.)<br />
• Two’s complement addition<br />
Uses ordinary binary addition, ignoring any carries beyond the<br />
MSB. The result will always be the correct sum as long as the<br />
range of the number system is not exceeded.<br />
If an addition operation produces a result that exceeds the range<br />
of the number system, overflow is said to occur<br />
Addition of two numbers with different signs can never produce<br />
overflow<br />
A simple rule for detecting overflow in addition is checking that if<br />
the signs of the addends are the same and the sign of the sum is<br />
different from the addends’ sign.<br />
Panupong Sornkhom, 2005/2 42<br />
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3. Representation of negative numbers<br />
(cont.)<br />
• Complement number systems (cont.)<br />
<br />
Two’s complement (cont.)<br />
• Two’s complement subtraction<br />
Negate the subtrahend by taking its two’s complement<br />
Then add it to the minuend using the normal rules for addition<br />
However, an attempt to negate the extra negative number results<br />
in overflow, for example, 1000 2<br />
= -8 but its two’s complement is<br />
not equal to +8 because overflow occurs when represent +8 in 4-<br />
bit two’s complement number.<br />
The extra negative number can still be used in additions and<br />
subtractions as long as the final result does not exceed the<br />
number range<br />
Panupong Sornkhom, 2005/2 43<br />
3. Representation of negative numbers<br />
(cont.)<br />
• Complement number systems (cont.)<br />
<br />
One’s complement<br />
• Complement of n-bit number N in one’s complement is<br />
computed by using the method below<br />
Complement each bit (change 0 to 1 and 1 to 0)<br />
• The MSB of a number represents sign bit<br />
0 = plus<br />
1 = minus<br />
• n-bit one’s-complement system represent number from<br />
–(2 n-1 -1) to +(2 n-1 -1) and there are two representation of zero<br />
Panupong Sornkhom, 2005/2 44<br />
22
3. Representation of negative numbers<br />
(cont.)<br />
• Complement number systems (cont.)<br />
<br />
One’s complement (cont.)<br />
• One’s complement addition<br />
Use ordinary binary addition then add the result with carry out of<br />
MSB, this rule is called end-around carry<br />
The overflow detection can perform as in two’s complement<br />
system<br />
• One’s complement subtraction<br />
Negate the subtrahend by taking its one’s complement<br />
Then add it to the minuend using the normal rules for addition<br />
Panupong Sornkhom, 2005/2 45<br />
3. Representation of negative numbers<br />
(cont.)<br />
Decimal<br />
Signed magnitude<br />
Two’s<br />
complement<br />
One’s<br />
complement<br />
-0/+0<br />
1000/0000<br />
- / 0000<br />
1111/0000<br />
-1/+1<br />
1001/0001<br />
1111/0001<br />
1110/0001<br />
-2/+2<br />
1010/0010<br />
1110/0010<br />
1101/0010<br />
-3/+3<br />
1011/0011<br />
1101/0011<br />
1100/0011<br />
-4/+4<br />
1100/0100<br />
1100/0100<br />
1011/0100<br />
-5/+5<br />
1101/0101<br />
1011/0101<br />
1010/0101<br />
-6/+6<br />
1110/0110<br />
1010/0110<br />
1001/0110<br />
-7/+7<br />
1111/0111<br />
1001/0111<br />
1000/0111<br />
-8/+8<br />
-/ -<br />
1000/ -<br />
-/ -<br />
Decimal and 4-bit numbers<br />
Panupong Sornkhom, 2005/2 46<br />
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