Mirrorcle Technologies, Inc. BDQ PicoAmp 4.x-025 User Guide

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Output Connector Pinout and Functions 6 Output: 8 - Pin Header J2-Pin Name Description 1 HV_A (X+) High Voltage Output for Channel X+ 2 GND Ground 3 HV_B (X-) High Voltage Output for Channel X- 4 GND Ground 5 HV_C (Y-) High Voltage Output for Channel Y- 6 GND Ground 7 HV_D (Y+) High Voltage Output for Channel Y+ 8 GND Ground © 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.
Specifications - General 7 Inputs: VDD: +5VDC High Voltage Enable: Digital enable/disable for the high voltage supply Filter Clock: User must provide filter clock for the 5 th Order Bessel low pass filters The clock (FCLK) can be driven by 3V logic, 50% duty cycle or close Set clock frequency to the desired filter cut off frequency x 60 • E.g.: Device datasheet states cut off freq. of 1kHz, then FCLK Input = 60kHz Analog Input X and Y: 0V to 2.5V input User applies 1.25V bias input on X and Y as MEMS mirror origin (no tip/tilt) Deviation from 1.25V results in mirror rotation in positive or negative direction. Outputs: HV_A (X+), HV_B (X-), HV_C (Y-), HV_D (Y+): 0V-140V Low current capability, 100pF) or long cables © 2012 - 2014 Mirrorcle Technologies, Inc. All rights reserved.
Page 1 and 2: Mirrorcle Technologies, Inc. BDQ Pi
Page 3 and 4: Features 3 Low voltage sup
Page 5: Input Connector Pinout and Function
Page 9 and 10: Bi-Directional Driving with Unipola
Page 11 and 12: Specifications - AC Response 11 A
Page 13 and 14: Bringing up BDQ PicoAmp 4.x 13 1. T
Page 15: Safe Range of Input Voltages 15 1.

Mirrorcle Technologies, Inc. BDQ PicoAmp 4.x-025 User Guide

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