PICMG 2.15, CompactPCI Telecom Mezzanine Card

CompactPCI ®
PICMG ® 2.15 Revision 1.0
PCI Telecom Mezzanine/Carrier Card
Short Form Specification
April 11, 2001
including:
ECN 2.15-1.0-001: 10/100/1000 Ethernet MDI Links on PTMCs
January 22, 2003
FOR INFORMATION ONLY; DO NOT ATTEMPT TO DESIGN
FROM THIS DOCUMENT
NOTE: This short form specification is a subset of the CompactPCI PTMC specification, PICMG 2.15
R 1.0. For complete guidelines on the design of PCI Telecom Mezzanine/Carrier Card implementations,
the full specification is required.
For a full copy of the PICMG 2.15 specification, go to www.picmg.org, or contact the PCI Industrial
Computer Manufacturers Group at 401 Edgewater Place, Suite 500, Wakefield, Mass., 01880. Phone
781-246-9318, fax 781-224-1239, email info@picmg.org.
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PICMG ® 2.15 Revision 1.0 SHORT FORM Specification
Engineering Change Notice 2.15-1.0-001
TOPIC: 10/100/1000 ETHERNET MDI LINKS ON PTMCS
Description
Two new options (Configuration 5 and Configuration 6) are added to the PICMG 2.15 specification to
augment the PTMC connector Configurations defined in the R1.0 document. Configuration 5 enhances
TDM capacities by extending the TDM (H.110) bandwidth and adding Ethernet links. Configuration 6
combines ATM (UTOPIA Level 2) capabilities with Ethernet links. Both of these new options
standardize use of Ethernet MDI links on the PMC connector at 10 Mb/s, 100 Mb/s and 1000 Mb/s. This
ECN did not modify any of the existing PTMC options and is compatible with these previous options.
PTMC Interface Configurations
Interface 0 1 2 3 4 5 6 7 >7
Serial Tx/Rx x x x x x x
RMII x x
RMII PHY Management I/F x x
10/100/1000 Ethernet MDI Ports 2 2
UTOPIA I/II (8-bit) x x x x
UTOPIA II (8/16-bit) x x
POS-PHY
x
Local CT (20 bit) x x
Extended Local CT (32 bit)
x
USER IO Pins
64 66 6 0 40 4 64
32-bit PCI x x x x x x x x
64-bit PCI
x
JTAG x x x x x x x x
SMB x x x x x x x x
RESERVED
Note: In Configurations 2 and 3, two of the USER IO pins are located on Jn3, and are identified
as USER1Z and USER2Z.
RESERVED
FOR INFORMATION ONLY;
DO NOT ATTEMPT TO DESIGN FROM THIS DOCUMENT

PICMG ® 2.15 Revision 1.0 SHORT FORM Specification
Relationship of Existing Standards and PTMC
Editorial corrections to the base PICMG 2.15 Release 1.0 document are also included in this ECN to
properly identify references to the Local CT bus and H.110 backplane CT bus signals. These changes do
not affect the functionality defined in the base specification.
Justification
The new mezzanine connector signal configurations introduced with this ECN define PTMCs that are
capable of managing larger traffic capacities (672 equivalent voice connections and above) than the
current PTMC mezzanine configurations permit. These higher traffic capacities are enabled with current
generation link termination and traffic processing silicon. PTMCs implementing these new buses will be
capable of implementing voice traffic transcoding operations among the following traffic protocols:
- Voice over IP (VoIP) traffic carried on 100Base-TX or 1000Base-T Ethernet links, either at a
front panel link on the mezzanine board or across the mezzanine / carrier connectors;
- Voice over ATM traffic carried in either AAL1 or AAL2 cells on external transmission links at
the front panel of the mezzanine board or on a Utopia 2 bus across the mezzanine / carrier
connectors;
- TDM voice traffic carried on either external TDM facilities at mezzanine board front panel
connectors or on an extended Local CT bus at the mezzanine / carrier connectors.
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PICMG ® 2.15 Revision 1.0 SHORT FORM Specification
INTRODUCTION
The PCI Telecom Mezzanine Card (PTMC) is based on the four connector standard PCI
Mezzanine Card (PMC). The PTMC provides all of the traditional PMC 32-bit PCI signals on
the Pn1 and Pn2 connectors and specifies the use of industry standard telecom interfaces on Pn3
and Pn4. In addition, interoperability with 64-bit PCI is provided as a dedicated configuration
type. PTMC leverages the success, form factor, and functionality of the PMC series of
peripheral mezzanine cards, but is not a replacement for PMC. It will coexist with PMC and
support four popular industry standard telecom bus interfaces. PTMC brings new definition and
flexibility to the world of slim modular mezzanine cards for PCI, CompactPCI, and VME.
Objectives of the PCI Telecom Mezzanine/Carrier Card Specification
The objective of the PTMC is to provide an industry standard from which designers,
manufacturers, and integrators will have a common platform for implementing a variety of
telecommunications hardware or specialized voice and data applications.
PTMC represents a leap in standardization for hosts and carriers with the capability for
delivering modular multi-function resources, through universal mezzanine cards that offer line
interface and/or co-processor functionality. Card vendors and developers will no longer have to
choose between competing hardware architectures to support standard telephony interfaces.
Instead, they will simply select PTMC modules with options based on the applications and
functionality that they wish to implement.
Design Goals
• Maximize Printed Circuit Board (PCB) space available for circuitry.
• Maintain Full Interoperable Compatibility (FIC) between PCI Telecom Carrier Cards
(PTCC) and PMC mezzanine cards (32-bit and 64-bit).
• Maintain Partial Interoperable Compatibility (PIC) between PTMC mezzanine cards and
PMC carrier cards that do not utilize Pn3/Jn3.
• Maintain Non-Invasive Compatibility (NIC) between PTMC modules and PMC carrier
cards that utilize Pn3/Jn3 to implement the 64-bit PCI bus extension (PCC64).
• Support multiple configurations of PTMC and PTCC modules and automatically sense
compatibility in hardware.
• Support user-defined Input/Output (I/O) for some configurations.
• Specify nothing that precludes Network Equipment Building Systems (NEBS)
compliance.
• Any PTMC application is correctly mapped to exactly one configuration and the rules for
making this mapping are clear.
PTMC is not a replacement for PMC – it is a specialized type of PMC. A PTMC module is
intended to interoperate primarily with special PCI Telecom Carrier Cards (PTCC), although
some interoperability with PCI Carrier Cards (PCC) is supported.
FOR INFORMATION ONLY;
DO NOT ATTEMPT TO DESIGN FROM THIS DOCUMENT

PICMG ® 2.15 Revision 1.0 SHORT FORM Specification
A deliberate effort was made to limit the PTMC to no more than four connectors to maximize
utilization of card surface area for IC and component placement. PTMC implements connector
configurations on two 64-pin connectors (Pn1/Jn1and Pn2/Jn2). These are identical to PMC
mezzanine card standards. Pn3/Jn3 and Pn4/Jn4 are implemented with identical 64-pin
connectors. Pn3/Jn3 is utilized to provide telecom specific functionality or 64-bit PCI bus
extensions. Pn4/Jn4 is utilized to provide telecom specific functionality or user-defined I/O.
Backwards compatibility with PMC cards compliant to IEEE 1386.1 and IEEE 1386 is
maintained mechanically to allow a PTCC to operate with PMC mezzanine cards via Pn1/Jn1,
Pn2/Jn2, Pn3/Jn3, and Pn4/Jn4. Backwards compatibility with PMC cards compliant to IEEE
1386.1 is maintained electrically to allow a PTCC to operate with PMC mezzanine cards via
Pn1/Jn1 and Pn2/Jn2.
Ground signal assignments on Pn3/Jn3 have been allocated identically to the 64-bit PCI bus
specification to eliminate conflict with carriers supporting 64-bit access. PCI data accesses of 64
bits are supported on the mezzanine card as a dedicated PTMC configuration. Other PTMC
configurations are non-invasive to the carrier card such that 64-bit operation can function on the
carrier while the mezzanine card is mated. The complete 2.15 specification describes the level of
interoperability for a variety of configurations.
A PCI Telecom IDentification (PTID) mechanism is specified for PTMC that allows a
mezzanine card to advertise its configuration and sense the carrier’s assertion of compatibility.
The complete 2.15 specification provides a thorough discussion of the interoperability of specific
mezzanine and carrier combinations.
The PTID mechanism is implemented to inherently allow a mezzanine card to sense that it has
been mated to a PMC carrier card. Mezzanine cards will electrically isolate their Pn3/Jn3 and
Pn4/Jn4 PTMC specified signals until the carrier determines that an interoperable configuration
has occurred. The complete 2.15 specification describes the PTID configuration mechanism and
its use in determining interoperability between carrier and mezzanine cards.
User-defined I/O has been maintained on Pn4/Jn4, for some configurations, in order to support
custom connectivity. The definition of all user-defined I/O is outside the scope of this
specification. Therefore, user-defined I/O on Pn4/Jn4 need not follow PTMC specified signal
isolation requirements. User-defined I/O on Pn3/Jn3 must follow PTMC specified signal
isolation requirements for compatibility with 64-bit PCI signaling.
Some PTMC applications can function equally well with more than one configuration. This
specification requires that a PTMC advertise a single configuration type. The complete 2.15
specification describes how to correctly choose a single PTMC configuration type.
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PICMG ® 2.15 Revision 1.0 SHORT FORM Specification
Interface
PTMC Interface Configurations
Serial Tx/Rx x x x x
RMII x x
RMII PHY Management I/F x x
UTOPIA I/II (8-bit) x x x
Configuration
0 1 2 3 4 5 6 7 >7
RESERVED
UTOPIA II (8/16-bit)
x
POS-PHY
x
Local CT x x
USER IO
64 66 6 0
64
32-bit PCI x x x x x x x x
64-bit PCI
x
JTAG x x x x x x x x
SMB x x x x x x x x
RESERVED
RESERVED
RESERVED
OVERVIEW
PCI and CompactPCI cards inter-communicate (within their respective systems) across a
common backplane via connections implemented with multiple high-density connector plugs and
jacks. Each slot’s high-density connector set allows wide data and address busses to be
implemented for supporting high-bandwidth data transfers.
Further demands for bandwidth can be addressed by subdividing the system architecture.
Processes that do not require connectivity to every slot can be isolated to dedicated secondary
data busses with a single bridge to the primary bus. This hierarchical approach requires bridge
components and enables the use of more processors to improve total system bandwidth. The
need for large amounts of circuitry within a single slot is often addressed with one or more
mezzanine cards that communicate with a carrier card. Only the carrier card need communicate
with the backplane, thus allowing the mezzanine/carrier combination to utilize a single
backplane slot. PTMC supports this approach for several popular telecommunication interfaces.
The PTMC specification utilizes industry standards for mezzanine cards and for
telecommunication busses. This standardizes the mechanical, electrical and functional aspects of
mezzanine-carrier interoperability in a telecommunications system. Restrictions and relaxations
of implementation requirements for these specifications are provided.
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PICMG ® 2.15 Revision 1.0 SHORT FORM Specification
Existing Standards
The chart below shows the parent/child relationships among specifications. The PCI Telecom
Mezzanine/Carrier Card Specification (PTMC) standardizes the mechanical and physical aspects
of the mezzanine card and its connection to a carrier card. Individual PTMC implementations
make use of the electrical and functional features of several popular telecommunication
standards.
PICMG 2.15
PTMC
IEEE 1386.1
PMC
H.110
ECTF
UTOPIA
Level 2
POS-PHY
RMII
SMBus
IEEE 1386
CMC
UTOPIA
Level 1
IEEE 802.3
I2C
PCI
Relationship of Existing Standards and PTMC
###
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