service information for eeprom ic setting - Jordans Manuals

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MAJOR IC INTERNAL BLOCK DIAGRAM LIC121 (AN22113A) : FEP(RF) ANALOG SIGNAL PROCESSOR • PIN ASSIGNMENT CDRFP 97 CDRFN 98 CDHPF 99 DLY1 100 DLY2 101 GND2 102 FO1 103 FO2 104 TR1 105 TR2 106 TR3 107 TR4 108 NC NC 109 110 VCC1 111 GND6 112 VREF 113 SVREF 114 VCC3 115 AIN 116 BIN 117 NC NC 118 119 EIN 120 FIN 121 NC NC 122 123 DACOUT 124 VREF08 125 VPD 126 NC 127 VREFPD 128 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 NC CLUMPGT WBL LPPS ASENV/LPPM GND4 VCC52 RSDAT RSEN SDAT SCK SEN VCC4 SH5 SH1 SH2 SH3 WIDGT/SH4 FEPIDGT/SH6 WTGT GND5 VCC51 BDO OFTR TC STMOUT PIO4 PIO3 PIO2 PIO1 PIO0 PO6 GND3 1 ROPCIN 2 APCAAF1 3 APCAAF2 4 APCAAF3 5 CPCAPH 6 CPCABH 7 NC 8 STMD 9 STMDN 10 NC 11 CBDOF 12 CBDOS 13 CHPOFT 14 COFTR 15 VCC6 16 VHALF 17 CTC 18 CXDPH1 19 CXDPH2 20 SEO1 21 SEO2 22 MOUT0 23 MOUT1 24 MOUT2 25 GND1 26 PO0 27 PO1 28 PO2 29 PO3 30 PO4 31 PO5 32 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 65 67 66 65 RFN RFP CWBLHPF1 CWBLHPF2 CWAGC1 CWAGC2 CWBLVGA1 CWBLVGA2 CRWCMP CRWAGC AIDENV/WBLDIF CWBLCMP CBPFAGC CLPPHPF CLPPPH RFOUT VCC2 CWBLBUF HDVREF RFIN1 RFIN2 FLTAMP EQOUTP EQOUTN PAD7 PAD6 PAD5 PAD4 PAD3 PAD2 PAD1 PAD0 AN22113A (Top View) 128Pin TQFP TQFP-128-P-1414A 4-38
MAJOR IC INTERNAL BLOCK DIAGRAM LIC121 (AN22113A) : FEP(RF) ANALOG SIGNAL PROCESSOR • BLOCK DIAGRAM FIN EIN TR3 TR4 AIN/TR1 BIN/TR2 HIN/Fo1 GIN/Fo2 VREF HDVREF Input Block CD/DVD Switch VREF Block S/H & VGA GATE Block STMD STMDN STMOUT SE01 SE02 TC TEC Block MPX SMFEP SMFEPN SSFEP SSFEPN SMTEP SMTEN SSTEP SSTEN SDAAOUT SDABOUT SDACOUT SDADOUT MPX M MPX VGA/ P Bypass FOCUS PPTE Block MPX Block SPLAOUT SDACOUT SDADOUT SPLBOUT SRFMA SRFMD SRFMB SRFMC SLP14 SLP23 WBL/LPP Block LPOS Block TCTI Block BDO Block SDPDTEP DPD Block MPX MPX SMTEP SMTEN OPC&ASENV Block MPX CHP0FT COFTR MPX OFTR Block APC Block RF Gene Block RFEQ Block JLINE Block LOGIC Block WBLDIF WBL ASENV/ LPPM LPPS OFTR VPD FPDN SDAT SCK SEN RSDAT RSEN Operation Circuit VHALF VREF08 RFP CDRFP RFN CDRFN SRFMA SRFMD SRFMB SRFMC VREF SW GATE To Each Block All Sum SDAAOUT + SDABOUT _ SLPOS1 X M P X COMP. VGA/ Bypass + _ + + VGA + PK SLP23 VGA COMP. ENV PK + SLP14 ENV TECENV AGC/ VGA S/H VGA BAL VGA Bypass VGA _ S/H VGA AGC/ Bypass BAL _ LPP Detection LPF WBL Detection SLPOS2 VGA DPD TE Dtetction TC/TI Dtetction PK ENV VG A LPF SBDOAS Lve1 Shift SDPDTEN SPLAOUT SPLBOUT TCOP TCON TIOP TION Group delay compensation MPX TCO TIO COMP. SPOF VGA VGA CLMP. LPF Bypass SSTEP SSTEN LPF PK ENV BT ENV + + VGA S/H VGA + ATT + COMP. Amp EQ 0FST Amp VGA VGA To Each Block S/H S/H VGA S/H JLINE COMP. LPF/ Bypass To Each Block To MPX ATT SEL LOGIC RF OUT BDO RFIN1 RFIN2 EQOUTP EQOUTN - - - - 4-39
Page 1 and 2:
SERVICE MANUAL HDD/DVD RECORDER MOD
Page 3 and 4:
SECTION 1 SUMMARY CONTENTS NEW FUNC
Page 5 and 6:
PRODUCT SAFETY SERVICING GUIDELINES
Page 7 and 8:
SERVICE INFORMATION FOR EEPROM IC S
Page 9 and 10:
SECTION 2 CABINET & MAIN CHASSIS CO
Page 11 and 12:
2. DECK MECHANISM SECTION(RS-01A) 1
Page 13 and 14:
SECTION 3 ELECTRICAL CONTENTS HDR P
Page 15 and 16:
No 12VL No 5VL YES YES Is the 13.5V
Page 17 and 18:
No 5.0VD No 3.3V YES YES Is there a
Page 19 and 20:
3. SYSTEM CIRCUIT PART “Please wa
Page 21 and 22:
6. NO OPTICAL / DIGITAL OUTPUT R110
Page 23 and 24:
8. NO EXTERNAL INPUT AUDIO < AV1 >
Page 25 and 26:
11. NO TV, EXTERNAL INPUT VIDEO SIG
Page 28 and 29:
BLOCK DIAGRAMS 1. OVERALL BLOCK DIA
Page 30 and 31:
3. LAYOUT CONNECTION BLOCK DIAGRAM_
Page 32 and 33:
5. Power : Main Board Block Diagram
Page 34 and 35:
7. I/O BLOCK DIAGRAM ( RCA MODEL ON
Page 36 and 37:
9. VIDEO S/W PATH BLOCK DIAGRAM TU7
Page 38 and 39:
11. AUDIO S/W PATH BLOCK DIAGRAM TU
Page 40 and 41:
3-39 3-40 13. MAIN BLOCK DIAGRAM (
Page 42 and 43:
CIRCUIT DIAGRAMS 1. SMPS 1 CIRCUIT
Page 44 and 45:
3. MPEG CIRCUIT DIAGRAM A B C D E F
Page 46 and 47:
5. RESET & 1394 & JEPG CIRCUIT DIAG
Page 48 and 49:
7. I/O, µ-COM CIRCUIT DIAGRAM 12 1
Page 50 and 51: 9. DECODER CIRCUIT DIAGRAM 12 11 10
Page 52 and 53: 3-63 3-64 • WAVEFORMS X1101 13.5
Page 54 and 55: MODE PIN NO. EE PB REC AF23 0.00 0.
Page 56 and 57: PRINTED CIRCUIT DIAGRAMS 1. MAIN P.
Page 58 and 59: 2. I/O P.C.BOARD ( BOTTOM VIEW ) 3-
Page 60 and 61: 4. TIMER1 P.C.BOARD 5. TIMER2 P.C.B
Page 63 and 64: SECTION 4 RS-01A LOADER PART CONTEN
Page 65 and 66: System Check. Load tray without ins
Page 67 and 68: Sled operating i s abnormal. Is the
Page 69 and 70: Focus Servo is unstable Is FE signa
Page 71 and 72: Recognition Fail Case 1: CD-ROM Fai
Page 73 and 74: In case of writing fail. Normal Cas
Page 75 and 76: LD CHECK (Laser operating is abnorm
Page 77 and 78: F G Select Mode: DVD, Test and perf
Page 79 and 80: 2. DISC SPECIFICATION 3. DISC MATER
Page 81 and 82: 3) Recording format using phase-cha
Page 83 and 84: 4. ORGANIZATION OF THE INNER DRIVE
Page 85 and 86: 4) Layout of DVD-R/RW disc Disc Cen
Page 87 and 88: 3. EXECUTE ALPC PROGRAM 1) Execute
Page 89 and 90: 4. OPTICAL POWER SETTING When you
Page 91 and 92: 6. OPTICAL POWER SETTING PARAMETER
Page 93 and 94: INTERNAL STRUCTURE OF THE PICK-UP 1
Page 95 and 96: 3. SIGNAL DETECTION OF THE P/U Infr
Page 97 and 98: DESCRIPTION OF CIRCUIT 2. FOCUS/TRA
Page 99: DESCRIPTION OF CIRCUIT 3. SPINDLE S
Page 103: IC301 (BD7956FS) : CD-ROM/DVD-ROM 7
Page 106 and 107: 2. RF CIRCUIT DIAGRAM A B C D E F G
Page 108 and 109: CIRCUIT VOLTAGE CHART MODE PIN NO.
Page 110: 2. MAIN P.C.BOARD (BOTTOM VIEW) 4-5
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