Presentation on Digital Predistortion of Power Amplifiers - Agilent ...
Presentation on Digital Predistortion of Power Amplifiers - Agilent ...
Presentation on Digital Predistortion of Power Amplifiers - Agilent ...
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<strong>Digital</strong> Predistorti<strong>on</strong> - 24<br />
Clock Timing for Predistorter<br />
RAM RAM Read Read Clock Clock (Divide (Divide by by 8)<br />
8)<br />
System System Clock<br />
Clock<br />
Write Write Enable Enable Clock<br />
Clock<br />
<strong>Digital</strong> Predistorti<strong>on</strong> <strong>of</strong> <strong>Power</strong> Amps<br />
June, 01<br />
Page 24<br />
The clock timing is essential to insuring that the data is presented to the data registers at the<br />
proper time before either being read or written to the RAM Look-up tables.The write enable<br />
and read enable clocks are derived for the system clock.
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