PWM and PFM Operation of DC/DC Converters ... - next!-Community

Power-Save Mode
MODE/DATA pin = Low
I
Forced-PWM Mode
OUT = 10 mA
MODE/DATA pin =
I =10 mA
High
OUT
V OUT = 1.8 V (20 mV/div)
V OUT = 1.8 V (20 mV/div)
Inductor Current (100 mA/div)
Inductor Current (100 mA/div)
Time Base – 10 µs/div
Time Base – 400 ns/div
a. Light-load V OUT ripple in power-save mode. b. V OUT ripple in forced-PWM mode.
Fig. 4. TPS62401 power-save (PFM) and fixed-frequency (PWM) operation waveforms.
Topic 7
Fig. 4a shows the increased output-voltage
ripple and periodic switching cycles that occur in
the power-save mode at light loads; it also shows
the slightly higher output-voltage setpoint. Fig. 4b
shows the reduced ripple voltage and continuous
switching cycles that occur when the converter is
operated in the forced-PWM mode.
An additional enhancement that can be
implemented to balance the trade-off between
good transient response (best in PWM mode) and
low power consumption (best in powersave/LPFM
mode) is an intermediate or FPFM
mode as shown for the TPS62350 in Fig. 5. The
user can control the mode of operation using I 2 C
commands to the converter IC. The device will
automatically transition between either the LPFM
or the FPFM power-save mode (based on its
preprogrammed register configuration) and the
PWM mode as required by the load-current level.
The LPFM mode works well for a system that
goes from a high load to a very light load, as in
sleep-mode operation. The LPFM control scheme
is based on a fixed inductor peak current. To get a
proper automatic transition between LPFM and
PWM operation, the inductor peak current is set
higher than the PWM peak-to-peak ripple current.
During the pulse-skipping phase, the converter runs
only its internal reference and a comparator to
monitor the output voltage. The advantage of LPFM
is much lower quiescent current and higher efficiency
compared with FPFM at low output loads.
If appropriately configured, the TPS62350
will automatically transition from PWM mode
into FPFM mode when the following conditions
are met simultaneously for three or more clock
cycles:
• The output voltage is within its regulation
limits.
• The inductor valley current reaches zero.
Efficiency – %
100
90
80
70
60
50
40
30
20
10
LPFM/PWM
FPFM/PWM
3-MHz PWM
V I = 3.6 V
V O = 1.5 V
L = 1 µH
C O = 10 µF
0
0.1 1 10 100 1000
I O – Output Current – mA
Fig. 5. LPFM, FPFM, and fixed-frequency PWM
efficiency of TPS62350.