Standards Kick-off Meeting Presentation - PVMC

Standards Kickoff Meeting
June 6 th , 2012
US PVMC
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Registration/Refreshment (5pm – 5:30pm)
c-Si U.S. PVMC Overview (5:30pm – 5:40pm)
– SunShot PVMI
– Mission and Program Areas
Agenda
Current Standards Activities at c-Si U.S. PVMC (5:40pm – 6pm)
– PV Standards Dashboard
– PVMC Challenges Pareto – Potential Standards Gaps Identified
U.S. PVMC / SDOs Discussion (6:00 pm – 7:15 pm)
– Identify best ways c-Si PVMC can engage with SDOs
– Briefing on recent and future SDOs Activities
– How potential standards gaps are being addressed?
– Overview of Committees/WGs/TFs and potential overlaps with c-Si PVMC programs
– Other opportunities for synergistic activities (Annual Forum, Training)
Meeting Wrap-up (7:15 pm – 7:30 pm)
– Calendar of events
Dinner/Networking (7:30 pm – 8:30 pm)
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Primary Goals of this Meeting
• Introduce c-Si U.S. PVMC to relevant SDOs and
affiliated organizations
• Identify best ways c-Si PVMC can engage with SDOs
(participate, not recreate!)

c-Si U.S. PVMC Overview
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DOE SunShot PVMI
• Mission of DOE SunShot Initiative
- Deliver grid-parity solar PV by 2020, a goal that will demand
~75% reduction in the cost of systems compared with today
- Advance large-scale U.S. solar manufacturing, drive national deployment of solar
energy
• SunShot Photovoltaic Manufacturing Initiative (PVMI)
PV Cells / Modules – 3 recipients
Balance of System
Power Electronics
• April 11 – award recipients of solar cell/module
- Industry-led consortium, SEMATECH – PVMC $62.5M
Copper indium gallium selenide (CIGS) pilot line, in partnership with CNSE
c-Si metrology and wafering technologies, in partnership with UCF/FSEC in Florida
- PV manufacturing development facility – SVTC $30.0M
- University-led consortium – BAPVC (Stanford/Berkeley) $25.0M
U.S. Photovoltaic Manufacturing Consortium (PVMC)
Consortium
Management CIGS cSi
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5

Initial c-Si U.S. PVMC Program Areas
In-line/Off-line c-Si Metrology
– Identify and rank critical industry needs in c-Si metrology
– Create national roadmap for metrology and participate in standards development efforts
– Develop projects to demonstrate new c-Si metrology technologies
– Build infrastructure to support metrology programs
– Transition new metrology technologies into pilot and manufacturing lines
– Provide member companies access to high-impact metrology tools and services
New Feedstock/Wafering Methodologies
– Identify and rank critical industry needs in feedstock and wafering
– Establish c-Si feedstock/wafering programs to accelerate transition of new technologies into
mainstream manufacturing
– Provide/foster process, test, and demonstration activities to validate new technologies and identify
barriers
– Create national roadmap and participate in standards development efforts
We expect to expand Program Areas going forward
Dr. Winston V. Schoenfeld
Dr. Hubert Seigneur
Mr. Kris Davis
Mr. Andy Rudack
Director, c-Si U.S. PVMC
Program Manager, Feedstock/Wafering
Program Manager, c-Si Metrology
Operations Manager
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Role of c-Si U.S. PVMC (Our Thoughts)
• Enhance industry representation in standards development
activities
• Identifying and addressing potential gaps in standards
relevant to c-Si metrology and feedstock/wafering
• Participating in relevant committees/TFs/WGs
• Improved bi-directional communication between industry
members and SDOs
We are here to get your input!

Current Standards Activities at c-Si
U.S. PVMC
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• PV Standard Dashboard
PV Standards Dashboard
– Example: http://wiki.sematech.org/
– Assess key SDOs and affiliated organizations
• Wafer/Cell (SEMI, SEMI PV Group, IEC, ASTM)
• Module (IEC, UL, ASTM, NREL-led QA TF)
• Systems (IEEE, Solar ABCs, SolarTech)
• Cross-Cutting (ISO, ANSI)
• Initial focus will be on the two c-Si U.S. PVMC program
areas
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Potential Gaps in Standards
WGs identified and ranked 80 total challenges with 33 related to standards
Sorry, we cannot provide the details of the challenges
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Potential Gaps in Standards
Directly Related Challenges
1. Lack of unified/accepted materials standards; Having an accepted/standardized methodology for
measuring all of the parameters that are important to identify feedstock quality
2. Overall Si recycling, incorporating recovered Si back into crystal melt; Utilization and standardization of
kerf fines for incorporation into melt
3. Test methods or a specific handling target to characterize/validate handling for thin wafers
4. Wafer consistency and better specifications for mechanical and electrical characterization of wafers
5. Determine optimal scan density and cost versus need
6. Standards related to new wafer formats (e.g. quasi-mono, n-type, epi-wafers, implant/cleave) and their
impacts on manufacturing (e.g. surface quality, cleaning and texturing)
7. Equipment/factory automation, standardization (height, software, communications, etc.)
8. Lack of knowledge/communication/acceptance of existing standards (information dissemination)
9. Issues related to electrostatics during manufacturing
10. Wafer and cell handling during measurements (standard thickness and thin wafers)
11. Integration of in-line and in situ metrology into manufacturing lines, from a communications/data
perspective (MES) and from a hardware perspective
12. Wafer/cell identification and tracking and traceability from source materials to final product
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Potential Gaps in Standards
Indirectly Related Challenges
1. Unestablished cell/module level reliability for non-EGS feedstock
2. Understanding of relationship between feedstock quality/impurities/other parameters on resultant cell
efficiency
3. Crucible and crucible coating quality
4. Characterization of compensated material (non-EGS)
5. Understanding critical crack lengths vs. wafer thickness
6. Correlation of reliability/degradation mechanisms to wafer quality/properties
7. End-of-life Si recycling and reintroduction potential in feedstock/ingot formation
8. Understanding uniformity and consistency of wafer quality from different feedstock sources, ingots, etc.
9. Carrier lifetime measurements (e.g. high-throughput single point, mapping, measurements on as-cut wafers,
separating lifetime due to bulk vs. surface recombination)
10. Evaluating uniformity of wafers from different polysilicon sources, ingots, bricks, etc.
11. Reliable/repeatable "go/no-go" breakage test correlated to micro-crack size, location, etc.
12. Electrical characterization of wafers and cells during cell processing (e.g. capacitive techniques, carrier lifetime,
measuring J 0 for each cell component)
13. Measuring optical properties of surfaces and coatings
14. Characterization of surface roughness
15. Evaluating cell contacts and cell interconnects
16. Optical characterization of module materials (e.g. glass, encapsulation)
17. Measuring interfacial adhesion of polymeric materials and polymer cross-linking during module lamination
18. Modeling/correlating energy yield (kWh/kW) for various climate zones using data measured at the factory floor
19. Improved standardized test methods for testing reliability of components and sub-components
20. Evaluating the quality of process gases, chemicals, polymers, pastes/inks, and other key manufacturing materials
21. Imaging-based automated inspection methods for cell and module manufacturing (e.g. alignment and aspect
ratio of front-grid contacts, color uniformity, straight conductor lines for modules)
PVMC Confidential – Not for reproduction/distribution without written permission from PVMC-FL

Discussion
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c-Si U.S. PVMC Meeting at IEEE PVSC
• Open Discussion Points
– Identify best ways c-Si PVMC can engage with SDOs
(Participate, not re-create! )
– Briefing on recent and future SDO Activities
– How potential standards gaps are being addressed?
– Overview of Committees/WGs/TFs and potential overlaps
with c-Si PVMC programs
– Other opportunities for synergistic activities (Annual
Forum, Training)
PVMC Confidential – Not for reproduction/distribution without written permission from PVMC-FL

Potential Annual Forum
• Proposing an Annual SDO forum
– Briefing on SDOs Activities
– Industry Feedback
• Gaps / Needs
– Write a Report (Made available to SDOs / PVMC members)
• Appropriate Venue
– SPI? Coordinate with solar ABCs
– IEEE
• Format
– ½ day
– 20 min presentations per SDO
– Strategic discussion
PVMC Confidential – Not for reproduction/distribution without written permission from PVMC-FL

2012 c-Si U.S. PVMC Events Calendar
Date Event Format Amplification
JAN 1/11 and 1/12 Kick-off meetings WebEx/telecon Identify/list key challenges
FEB
2/1 and 2/2 Follow-up Meetings WebEx/telecon Review Pareto results for challenges
2/7/2012 Conference - Washington, DC DOE Metrology Workshop Networking
MAR 3/7 and 3/8 Working Group Face to face meeting Identify projects for Pareto analysis
4/12/2012 Working Group WebEx/telecon Review Pareto and provide comments
APR
NREL-PVMC Projects
4/25/2012 John Wohlgemuth - NREL WebEx/telecon
Review Papers/Standards
5/3/2012 SEMATECH-PVMC Meeting Face to face meeting Progress Status
MAY
5/7/2012 Carl Osterwald - NREL WebEx/telecon Standards
5/8/2012 Larry Sherwood – Solar ABCs WebEx/telecon Standards
5/25/2012 Workshop Committee WebEx/telecon Select Technical Program
6/6/2012
Standards kick-off meetings
Conference - Austin, TX
IEEE PVSC
JUN 5pm – 8:30pm
Networking
6/13 and 6/14 DOE SunShot Forum Poster session Showcase c-Si PVMC
7/10
Feedstock/Wafering Workshop
7/11 Conference – San Francisco, CA
Intersolar NA
Networking
7/12
Metrology Workshop
JUL
7/25/12
Conference - Vail, CO
Roadmap kick-off meeting
7/25/12
NREL c-Si Workshop
Networking
7/26/12
Golden, CO
NREL Visit
AUG 8/8 and 8/9 Working Group WebEx/telecon Project execution and review
9/10/12
Face to face meetings
SEP to
Conference - Orlando, FL Solar Power International
SDOs Forum
9/13/12
Networking
OCT 10/10 and 10/11 Working Group WebEx/telecon Project execution and review
NOV 11/14 and 11/15 Working Group WebEx/telecon Project execution and review
DEC 12/12 and 12/13 Working Group WebEx/telecon Project execution and review
PVMC Confidential – Not for reproduction/distribution without written permission from PVMC-FL