Spec sheet available in PDF format. - All Electronics

fteface
This user's manuar conceming DMC series has been prepared for all users of oprREx's dot
matrix LcD modures (character type DMC Series) to assist trem in designing with the modures
properly and efficiently.
CONTENTS
I . Function and Structurr.
l.t General
I
1.2 I ? Characteristics. fhoer+o;.+i^. . . . . I
""""
I .3 List of DMC series.
I
!.4 Explanation of functions.
2
l'5
.........
Block diagram 3
' .........
I .6 Explanation of intemal operation 6
.
1.7 Cautions when
g
using the module. . . . . ......
lg
2' Instructions'
2.1 Detailedexplanations
.2 Examples of Instructions.
.........r9
"""'25
3. Opticat characteristics .
35
4, Electricalchaftrcteristics
4.1 ....36
Absolute maximum ratings
4.2 Electrical characteristics 36
43 Tirning charactedstics
3?
37
5. Connection diagram with MpU
40
6. Special specifications. . . . .
6.! EL specifications for DMC 42
series.
6.2 l|lLgh reliability specifications
42
5.3 Examptes of Tcmpcrature 4S
compcnsation ciEuits
-.. . 46

1. FUNCTION AND STRUCTURE
1.1 General
DMC series is the name given to the dot matrix LCD display modules that have recently been
developed by oPTREX coRPoRATloN. The modules consisr of high contrast-large viewing
angle TN type LC panel, with a CMOS driver and controller, which have a tow power consump
tion. The controller is equipped with an intemal character generator ROM, RAM and RAM for
display data. All display functions are controllable by instructions making the interfacing with
MPU eary.
Both display data RAM and character generator RAM can be read, making it possihle to use
any part not used for display as general data RAM. The products of this series therefore have a
wide application possibilities in the field of terminal display or display for measuring devices.
72 Charactorbtic
(l) 5x TdotstCunor,5x8dotsor5x ll dots, dot matrix LCD (TN mode)
Q, 4 bit or 8 bit interface with MpU is possible
(3) Display data RAM.........80x 8bit(Max 80 characters)
(4) ChaEcter generator ROM. . .Character fonr 5 x 7 dots 160 kinds
Character font 5 x l0 dots 32 kinds
(5) Character generator RA.lrl . . .Program write (64 x g bit)
Character font 5 x 7 dots 8 kinds or
Character font 5 x l0 dots 4 kinds
(6) Both display data RAM and character generator RAM can be read fronr Mpu
(7) Duty ratio... ....t Line Display, llgduty Sx7 dots + Cursor, sxg dors
l/t I duty 5rl I dots
t/16 dury 5xZ dots + Cursor, 5xg dots
(8) Wide variety of operating instructions:
2 Line Display: l/16 duty SxZ dots + Cursor, Sxg dors
4 Line Display: l/16 duty 5r8 dors
Display clear, Cunor home, Dispray oN/oFF, Dispray character brink, cursor shift.
Display shift.
(9) Internal automatic reset circuit when supplied with power.
( l0) Intemal oscillating circuit
(l l) CMOS process used
( l2) Logic power source: Single (+5V)
( 13) Operating temperatur€ range: 0 - +50"C (Standard type)
-20 - +70'C (..H" type)
-1-

1.3 Lbt ot DMC aeries
Table #1
\rtcm
Modcl Nol\
DMC 161064
DMC 16106C
DMc161l7
DMc16128
DMC 16129
DMC l6106B
DMC 16207
DMCl6230
DMC 16433
DMC202l5
DMC 20434
DMC24138
D\ic24227
DMc32l32
DMC32239
DMC32216
DMC4013l
DMC402l8
DMC40440
Display
Format
16 ch.r.ct.D
rllinc
15 d||nct t
r I linc
l5 chtnclcrt
x I linc
16 chictcr3
x I linc
15 chrtrclcal
r I linc
16 cll|'|cta$
x I linc
16 ch$.clcr3
x 2 lin6
16 ch.trctcE
r 2 lin6
16 ch.nctcr.
x 4 linct
20 ch.t ctctt
r 2 hnc3
20 chrr.ctcts
! 4 linc.
24 ch|'rclq.
rlli'lc
24 ch.nctcr3
Chsncter Font
5x I I dots
5x Sdots
5x 8 dots
5x ?dots + Cursor
Module Size I View Area
wxHrT(rnm)l wxH(mm)
Character Size
wxH(mn)
Dot Size
WrH (mm)
80x36x10 I 64.5x 13 IzxU 0.6x 0.7
80x36x10
80x36x10
l22x33x I I
64.5x l3 &2x5.95 0.6x0.7
54.5x13 3.2x5.95 06x0?
99x 13 4.84x9.66 0.92x1.1
5x 7 dots + Cursor l22x33xll 99x l3 4.84x9.66 0.92x Ll
5x 7 dots + Cursot t30x44xl0 99x l3
5x Sdots
5x 7 dots + Cursor
84x44xl I
tnx44xll
5x 8 dots 87x60xll 61.8x25.2
5x 8 dots
I l6x44x 1l
4.9x 9.5 0.9x 1.05
6lxl6 2.95x5.55 0.55x065
99x24 4.84x9.66 092x1.1
295x4.?5
o 55x055
83xl&6 3.2x5.55 0.6x0.65
5x Sdors | 9&0x60x I I 76x25.2 2.95x4.7 5 0.55x0.55
5x l1 dots
x 2 li!.t 5x Sdors I l8x36xl I
l18x36xl I 93.5x 15.8 9.2x8.2 | 0.6x 0.7
93.5x 15.8 | 3.2x5.55 0.6x0.65
32 clu'.ctcrl
x I lir.
5x I ! dots l?4.5x3lxll 123.5x16.5 | g.zxaz | 0.6x0'7
32 ch{rctcn
r 5x
2 linca
Sdots l74.5x31xll l4l.0x 16.5 3.45x5.55 0.65x0.65
32 chlrclcF
3.2x5.55 0.6x065
5x Sdots l75x44x 1l 130 x 18.6
x 2 linc3
182x3X5x11 152.5x t 6.5 3.2x8.2 0.6 x
40 dr$tctcn
0.7
r I
5x
linc
1l dots
/O chtlclcrt l82x3X5x 1l l52.5x 16.5 3.2x5.55 0.6x0.65
5x 8 dors
40 chrnctqt
t 4 linct
5x I dots 200x?0x13 165 x 40 3.2x5.95 0.6 x 0.7
-2-

1.4 Explanation ot functioni
(l) Pin positions and signal names for
DMC t6t06A, DMC t6l06c, DMC t6t t7,
DMCt6t28, DMCl6t29. DMC t6433.
(2) Pin positions and signal names for
DMC t61068, DMC t6207, DMC t6230.
DMC202t5. DMC32216.
lilf3----------21
Pin No. Symbol
I
Vss
2 Vcc
Vee
4 RS
R,/N
b
E
DBO
8 DBI
9 DB2
l0
ll
l2
l2
l4
DB3
DB4
DB5
DB6
DB7
Pin No.
I
2
Synbol
Vss
Vcc
Vee
4 RS
) R,,W
6 E
7 DBO
8 DBt
I DB2
I
l0
il
t2
l3
l4
DB3
DB4
DB5
DB6
DB7
-3-

(3) Pin positions snd signal namcs for
DMC24227, DUC24138, DMC32l32,
DMC 32239, DMC 401 3 I, DMC 402 r 8.
(4) Pin position
DMC40440.
and signal names for
l{
I
I
I
o
OO 13
oo
oo
oo
oo oo oo
i;tl
roo| |
roo I
'oo .oql
I
rod :
'Oo.:
;i;, i
Pin No. Symbol
I
Vss
2 Vcc
a
Vee
4 RS
J
o
R/W
E
7 DBO
8 DBI
o
l0
tl
r2
l3
l4
DB2
DB3
DB4
DB5
DB6
DB7
Pin No. Symbol
I
DB7
2 DB6
J
DB5
4 DB4
D
DB3
6 DB2
7
DBl
I
l0
ll
DBO
9 E
r2
l3
t4
IJ
l6
F/W
RS
Vee
Vss
Vcc
LS
NC
-{-

Trbh #2 List of terminal tunctions
Signal name
Number
of line
Input/
output
Connected
to
Function
DB4 - DB7
4
Input/
output
MPU
4 lines of high order data bus. Tristate, bidirectional.
Tramfer of data between MPU and
module is done tlrough these lines. Also DB7
can be used as busy flag.
DBO - DB3
lnput/
output
MPU
4 lines of low order data bus, Tristate. bidirectional.
Transfer of data between MPU and
module is done through these lines. However in
case of4 bit operation, they are not used.
E I Input MPU Operation start signal for data read/write.
Rnv
I Input MPU
Signal to select Read (R) or Write (lV)
"0" : Write
"l " : Read
RS
I Input MPU
Signal to select register
"0" : Instruction register (Write)
: Busy flag; Address counter (Read)
"1" : Data register (Write, Read)
LS
I Input MPU
Signd to select line of display panel. This
termind is for DMC 40t140 only.
"1" : To select upper 2lines
"0" : To select lower 2 lines
Vce
I
Power
supply
Terminal for LCD drive power source
Vcc
I
Power
supply
+5V
Vss
I
Power
supply
0v (GND)
-5-

EI
IE
ri
!F
I
o
t
I
e
F
t t
E3
q
a
lr.
,lt
llr
JiJ grr
-6-

Ei
8:
JE
si
E:
6e
B
F
C'
:
C)
x
a
I
o
EI
o o
-7-

1,6 Explanation of intemal operation
(l) Register
The Controller for the DMC series has 2 kinds of 8 bit registen, which are the
Instruction register (IR) and the data register (DR).
IR is a register to store instruction codes tike Display Clear or Cursor Shift as
well as address informations for disptay data RAM (DDRAM) or character generator :
RAM (CG RAjr{).
IR can be written from MPU but cannot be read by the MpU.
DR is a register used for storing temporarilly data to be wdtten into DD RAM or
CG RAM and data to be r€ad out from DD RAM or CG RAM.
Data written into DR from Mpu is automatically written into DD RAM or cG
RAM by intemal operation.
AIso DR is used to store data when reading out data from DD RAM or cG I{AM.
when addres informations ar€ written into tR, data is read out from DD RAM
or CG RAM to DR by internal operation.
Data transfer to the MpU is then completed by the MpU reaching of DR.
After MPU reads DR, data in the DD RAM or cG RAM at the next address rs
sent to DR for the next read from the MpU. Register selector (RS) signals make
their selection from these two registers.
I
Table #3 S€l€ction of registers
RS
R/w
OPERAT|OI\i
0
0
IR write, intemal operation (Display Clear etc.)
0 I
Bury0ag @Bz ) and address counter (DBo - DBe ) read
I 0
DR Write, Intemal Operation (DR* DD RAM or CG RAM)
I
I
DR Read, Intemal Operation (DD RAM or CG RAM)
-8-

(2\ Busy flag(BF)
When the Busy Flag is "1", the module is in the internal operation and the next
instruction will not be accepted. As shown in the Table #3, the busy flag outputs to
DBr when RS=o, RA =I. The next instruction must be written after ensuring that
the busy flag is "0".
(3) Address Counter (AC)
The address counter (AC) assigns address to DD RAM and CG RAM'
When an instruction for address is written in IR, the address information is sent
from IR to AC. The selection of either DD or CG RAM is also determined concurrently
by the instruction.
After writing into (reading from) DD RAM or CG RAM display data, address
counter (AC) is automatically incremented by +l (or decramented by -l ). AC
contents arc outputted to DBo - DBr when RS=0 and R/Wl as shown in Table
(4) Display data RAM (DD RAM)
The disptay data RAM stores display data represented in &bit character code. Its
capacity is 80 x 8 bits or 80 characters. The display data RAM that is not used for
display can be used as a general data RAM.
Relations between DD RAM addresses and positions on the LCD are shown
below.
The DD RAM addrcss (ADD) is set in the Address Counter (AC) and is represented
in hexadecimal notation.
MSB
LSB
AC:
Hcxrdccimd
Hcxrdecimal
lErample 1l DD RAM sddrgs '?E"
I 0 0 I I 0
E
-9-

[Example 2] 4O columnr I tine disptay (DMg0Ol3il
Column
t2
I lin€

lJine
z.|ne
Column
t2345
t4 15 t6
00 0l 02 03 04 OD OE OF
40 4l 43 44 4D 4E 4F
_ Diglay
column
.
DD RAM
Address
When the display shift is pcrformed DD RAM address moves as follows
0l 02 03 04 05 OE OF t0
Left shifi
4l 43 44 45 4E 4F 50
00 0l 02 03 0c OD OE
Righr shifr
67 40 4l 42 43 Q 4D 4E
Other 2-line display modules movc the same wav.
ftJine
uppe4
8-linc
[Example 4] 40 columnr 4 tinrr dilphy (DMC40[4OI
In case of DMC4O440, the display is similar to 40 columns 2 lines and it is used
by switching the upper trro rines and lower two lines by LS signars. Therefore
the relation between DD RAM and display columns is as follows:
Column
t2345
- Displey
column
39 40
00 0t 02 03 u 26 )1
40 4l 42 43 44 66 67
*
DD RAM
Address
Ie-rine
Lowcrf
[4.line
m 0l 02 03 u 26 'l'l
40 4l 42
'l *l loo 67
.
DD RAM
Addrcs.s
-11-

when LS = ..1" (selecting upper lines) and shifting the display to the right, the
DD RAM address moves as follows:
Uppcr
{Hhc
[2{inc
3-linc
4Jinc
1., 00 0t 02 03
,'<
26
67 40 4l 42 43 55 66
00 0r 02 03 04 26 27
zl0 4l 42 43 4 66 67
lffhen LS = *0" (tower line selection) and disptay is shifted to the riSht' DD RAM
address moves as follows:
Uppcr
l -linc
2-linc
00 0r 02 03 (X 26
40 4l 42 43 4 66 67
[rlinc
lrwcrl
[4-linc
11 00 0l 02 03 25 26
67 4 4l 42 43 65 66
In case of DMC40440, it can be considered as a module combining 2 modules of 40
cotumns2linesdisplay.Horreverslriftingthe4linesatthesametimeisnotpossible.
hiortowritinginstructionitisnecesarytospecifyeithertheuppet2.lineorthe
lower 2line using the LS sienal.
[Exrmple5l16columnrllincdirphy{1/16dutyt;dndhplaywillbca:follow::
l -linc
Column
123 89
14 t5 16
00 0l 02 o7 40 45 46 47
-Disptay
column
.DD RAM
Address
-t2-

(5) Orancter gencrator ROM (CG ROM)
The character generator ROM (CG ROM) is a ROM capable to generate from
&bit character code, 5 x 7 dots or 5 x l0 dott chancter pattem.
The said ROM can getrerate 160 kinds of 5 x ? dots or 32 kinds of 5 x l0 dots
character pattems.
Howevcr cautions ane requested whcn opcrating this RoM because those character
fonts of 5 x 7 dots of the modurc will not be displayed after the gth row of 5 x
l0 dots charecter pattem.
Also this RoM can be modified to gpnerate character pattem of our users
choice.
For further der'its, please contact OpTREX sates depanmenr.
(6) Character generator RAM (CtG RAM)
The character generator RAM is the RAM with which the user can rewrite
charactet patterns by program.
With 5 x 7 dots 8 types of character patt€rns can be written. To display character
pattems stor€d in cG RAM write tre chrracter codes in the reft corumn of rabte
5.1 and 5.2 in the DD RAM conesponding to the display position.
The relations between CG RAM address and data and disptayed pattem are
shown in Table #5.1 and 5.2 respectivcly.
Besides, at€a not used for disptay can be used as general data RAM,
-13-

T$h #4 Co.?..poda|u b.ttraaai Cl|'-tat Godaa atd aliral.r p'ntln'
------__{otu,r 0000 ml0 00ll 0t00 0l0l 0||0 0lll t0t0 l0tl ||00 0l t0 ||tl
I:i
I
..!l
I
:.I
! x \00o I
rl -!!!__r__!!:__-L!,___i
I i:-l
xxxr0.0l
yr!r00t0
-T'jI
T-T
3.
;:l
tl
H : .-..1
!l
.-'l
5 ;I
T
-il
;l
I
!!!___-L ..1..1
\ml I
-:l i.:'l ':'i I3 '--T
t:'! |
il
.!".
: .l
I
I
__!=J
-'l =!-l
:F-T
-T
x 0ro
_+'_l I tt-. ITl _!l .ii
il ..1
__!=l __-:-tIj
-!+ :'i 'i": ::
I
:
t r x ^0101
EI
'6,
i_j :_.i
-FTFI -r.t
r x x x0lt0
;
1.r I:I] ..,.1 ...1
, x x tol lt
4 x r1000
, r xl00l
r!i
F'lF : tl
I 1. :l -I
1
.-l
:l
r
I i: ? t_.1 *t ?
?
r3)
rrt/t0t0 .l
xtxrll00
t5l .|
! x r x lllC
x tl
(5)
Ī
(l)
'T.
:JTi
---t -": I
.31
.t
i.r:
I
+.
t!
-* $
? -. 1
,* I
i"
r-1 tt. FI
f,l
I t' il t t
! r1 -+ 1: llr n
(a)
J ft + ttl
r.
l -l tr
r:t
(Norc) Ch.nc&r ofhiSh ordct b lII0|t|dIIII
v bc hd'qurt'
-14-

Table #5.1 Rolation bd r€on CG RAM !ddr6s, chlrac'tor codes (DD RAM) and cfiaracter
p.ttsms (CG RAM datrl (in cat. of 5 x 7 dotsl
Nob: (l)
(2)
(3)
(4)
(s)
765{3210
0 0 0 0*0 0 0
0000*001
0000r

Tablc #52 RolEtion betvcan CG RAM addns, .$attcr codes (DD RAM) and chanctor
pattoms (CG RAM ddal {in caro of 5 x l0 doal
76543210
- HiShGr ordq Loc/at ordct.
bir bir
-
0000'k00*
3..?
"l*9i.-
0000
0001
00t0
001I
0100
0l0t
0l t0
0l r I
t 000
1001
t0t0
l0l
| 100
I l0l
I l l0
lllt
I
000
000
000
000
*+x**
I
I
I
*****
00
00
00
0
0
0
0
0
Exrmplr of chia.clcr
Prttcm
Crrlor politio.r
0000*ll*
t rlt 0 0 I
Ir o r o
__1: _"_ : _
t0lt
l100
I l0l
I I l0
ltll
----i-------
* * *r* * * * *
I
I
i
***x*
.mGlnl
Do!'t crrc.
Noto: (l) Ch.racter code bits l,2correspond to CG RAM address bits4,5 (2 bits: 4 typ6)
(2) CG RAM address bits 0 - 3 designate character line position.
The I I th line is the ornor position and display is performcd in logical OR with
cul50r.
Maintain the I lth line corresponding to the cursor display position in the "0" state
for cursor display.
When the I lth line data is "1", bit I lights up regardless of cursor existcnce.
(3) Character pattern row positions are the same as 5 x 7 dot character pattern posi'
tions.
(4) As shown in Table 5.2 CG RAM charactcr pattems arc selected when character code
bits 4 - 7 are all "0". However, sincc character code bit 0 and 3 are ineffective bits,
the display of charactd pattem exarnple is selected by character code "00" "Ol"
"08" "09" (Hexadecimal)
(5) "!" for CG RAM data corresponds to selection for display and "0" for non'sclec'
tion.
-16-

Table #6 List of instruc{ionr
halruction
Codc
Excc!tion timc
Dc.cription
(irl.x)
RS Rnp DBr DR. DBs DB- DBr DBo
(when fcp o.
fosc is 250kHz)
Ocar
Di.phy
0 0 0 0 0 0 0 0 0 I
Clcst!.ntir. di.pl.y |od s.ls DD
RAM rddrc.s 0 in rddllt counrcr.
l.64ms
Srt DD RAM.ddrc$ 0 ir ddrcrs
Ralutr!
Hornc
0 0 0 0 0 0 0 0 I countcr. Abo artumt dirphy bcinr
rhifacd ro oriainsl po.ition. DD RiM l-64ms
contcn$ rcmain unch$tcd.
Slti curtor movc dlrcclion and
Enry
odc
0
Sct
0 0 0 0 0 0 I tlD s
tpccificr .hifr of di$by.
Th6c opcrations att pcrformcd duriD8
d.|| f,,rile rnd rcrd.
40rs
Disphy
Scc ON/OFF of.nrjF ditgl.y (D).
ON/OFF o 0 0 0 0 0 I D c a cunor ON/OFF (C), rnd
Control
blink of
cur3or position ch.r.ct.. (B).
40|rs
Clrtor or
Dirpby 0 o 0 0 0 I src R/L
lloucr c||rtor .nd rhiflr dilDhv vithouI
ch.uins DD RAI{ conic;rs.
4otls
Shifr
Function
Scts intcrface drrr l.nrth (DL).
S€t
0 0 0 0 DL N F
numb.r ofdilpLy lin6 (L) .nd
chrncicr fonr (F).
40!r
S.T CG RAM
Addrcs 0 0 0 I AGC S.t, CG RAM sddtltr. CG RAM d.r.
is tcnt rttd rrctivcd rficr this lcttin&
4Opr
Srr DD RAM
Addr.rs 0 0 I ADD Scl' DD RAM.ddl€3!. DD RAM dal.
ia tant and rcceivcd aftGr thia scninS. 40/s
Rc.d
Bury Flr3 0 I BF
icdr luty fl4 (BF) iidic.riDg
AC mlclnrl opcr.tion
& Addrlr.
it bcina Dcrfonnd
ard trrd! rddrasr countci contcntr.
40rs
Writ. D!t.
to CG or 0 Writc D.te
Writer d.tr into DD RAM or CG
DD RAM
RAM.
40ts
Rc.d D.r.
fron CG ot I Rc.d lhra Rc.dr dj. frorn DD RAM or CC
DD RAM
RAM.
4Ors
UD.l Incrcmcnt
DD RAM : Di.phy drt. RAM
UD-o Exccution
Dlctdn?nt
timc
CG RAM : Ch{.cacs gstrcr.tor RAM chan8cs whcn
3Ar ACt : CE RAM
$STltf,,firdiebv'hirt'
dd'llr fraquancy chenSca.
S/C.{ ADD : DD RAM rddrr$. (Ex.mDlc)
Ctror movc
Cortlgotrdt to c||raor
R/L=l
l{hcn Shifi ro
fcp or forc
rh. rilhr.
.ddIl$.
R/L.o il 27OkHz:
Shifrr io rhc Efr-
DL=l
AC : Addrcat countcr u,cd
8 bib, DL.o : 4 bits.
for borh DD
N-l
md Cc
2lin6, N.0: I lit|a
,101s
RAlrl .ddrcrt.
r 2!! - 37r,
F=l
5rl0 dor., F.0: 5r7 dot!
210
BF-l Intcmdly oDcnrilr
BF.0 : C:n.cccgf iurrucdon
-17-

1.7 Cautionr when using the moduh
( I ) LCD panel is made of glas so plcase 8void subjecting to strong mechanical shock
or applying strong pressurc on to the surface of display area.
(2) The polarizcr used on the surface of display panel is easily scratched and
2
damaged. Therefore please be careful when handling the module.
(3) CMO$LSI is uscd for module circuit therefore your attention is called to the
following:
I ) All unused input teminals should bc connected to Vcc or GND. The selection of
Vcc or GND will depend upon which connection will satisfy the desircd logical
function.
2) Wh* power sourcc voltage is not applied avoid applying input signal.
3) Anti-static etectricity measules
a. When working pleasc bc sur€ to either use your naked or gloved hand and
wear non

2. TNSTRUCTIONS
2,1 Detailedexplanations
(t) Clear Display
RS R,/W DB'
0 010 0 0 0 0 0 U I
DBo
Writes the space code "20" (hexadecimal) into all address of DD RAM. Retums
display to its original position if it was shifted. In other words the display disappears
and tlte cursor or blink moves to the left edge of the display (the first line if 2lines
are displayed). The ex€cution of clear display instruction sets entry mode to increment
mode.
(2') Retum Home
RS R,,/W DBT
0 0 0 0 0 0 0 0 I
rmcans Don't care
Sets the DD RAM address "0" in address counter. Retum display to its original
position if it was strifted. DD RAM contents do not change.
The cursor or the blink moves to the left edge of the display (the first line if 2
lines are displayed)
(3) Entry mode set
RS S,/W DBT
DBo
Codc
0 0 0 0 0 0 0 I T,/D S
UD:
S:
Increments (I/D = l) or decrcments (ID = 0) the DD MM address by I
when a character code is written into or read from the DD RAM.
The cunor or blink movcs to the right when incr€mented by +1.
The same applies to writing and reading of CG RAM.
Shifts the entire display either to the right or to the left when S = I ; shift to
the left when l/D = | and to the right when l/D = O. Thus it looks as if the
cutsor stands still and only the display seelns to move.
The display does not shift when reading from DD RAM nor when S = 0.
- 19-

(4) Display ON/OFF Control
RS R,/W DBI
Codc
0 0 0 0 0 0 I D L B
D:
C:
B:
The display is ON when D = t and OFF when D = 0. When OFF due to D =
0, display data remains in the DD RAM. It can be displayed immediately by
setting D = l.
The cursor ilisplays when C = I and does not display when C = 0.
Even if the cursor disappears, the function of I/D ctc, does not change
during data write.
The cursor is displayed on the 8th line whcn 5 x 7 dot character font has
been selected.
The character indicated by cursor blinks when B = I . The blink is displayed
by switching between all blank dot and display characters at 0.4 sec
interval.
The cursor and the blink can be set to display simultaneously.
ltttl
IIII
anlr
LI
-
5x7dot
L Ufl'T
-I
rrrrn
r-
rlil
tttl
tttl
FTNI
LLI LI
LIJ
5 x l0 dots
chffrctcr font drsrect3r font
H*I
CEEED I
Alt€rnrting display
(a) Curror displey exemplc
(b) Blink display cxamplc
(5) Cursor or display shift
Codc
RS R,/WDBI
0 0 0 0 0 I 3/C R.L
DBo
.mcrnt Don't carc.
-20-

(5) g*561 q1 display shift
Shifts cunor position or display to the rieht or laft without writing or reading
display data. This function is used to corect or search for the display. In a 2-line
display the cursor movrs to the 2nd line when it passes the 40th digit of the tst line.
Notice that thc lst and 2nd line displays will shift at the satne time.
When the disptaycd data is shifted repeatedly each line only moves horizontally
but the 2nd line display do€s nor shift into the lst tine position.
s/c
R/L
0 0 Shifc currcr pcition to the teft (AC is decremented by one)
0 t Shifts cunor pcition to thc right (AC is incremented by one)
I 0 Shifts the cntirc dbplay to the lcft. The cursor follo*s the display shift.
I I Shifts the entire display to the right. The cunor follons the display shift.
The contents of Addrcss Counter (AC) do not ch$ge if the only action p€rformed
is sltifting dtsphD'.
(6) Function s€t
(a) l -line display
RS R,/W DBI
DBo
0 0 0 0 I DL 0 F
rrncrnr Don't crrc
(b) 2{ine display
RS R,ZW DBI
DBo
Codc
0 0 0 0 DL I
. mc|ns l)on't€atc
-21-

DL: Sets interface data lcndh. Data are sent or received in 8 bits lengfh (DBr -
DBo ) when DL='l 'and in bits length (DB, - DBr) when DL= 0.
When the 4 bits length is selccted, data must be scnt or rcccived twice.
F: Scts character font.
F="1":5xl0dots
F="0":5x7dots
Nots: l) Perform thc function at the head of the program befort executing all
instructions (except "Busy flagfaddress read). From this point, the function
sct instruction cannot be executed other than to changs interface
lcngth.
2) lilhcn powcr srpply b applied the following initial sctting is automaticdly
set r€grdlcss of typcs of modules.
(i) Display clear
(ii) Function set
Intcrfacc data length 8 bits
l.line display
(iii) Display ON/OFF Control
Display OFF, Cursor OFF, Blink OFF.
(iv) Entry mode set
No inclement or shift.
Therefore in case of 2 (4) lines display module, it is necessary to
excute function sct agin.
3) To correctly operate the initial setting the following condidons for the
powcr sounoe ar€ necessary.
0.1 n|s lna
(7) SetCG RAM address
. Toff stipulates the time of power OFF for power supply iNtantaneous
cut off or when the power supply repeats ON/OFF.
If the above conditions are not satisfied automatic initid setting cannot
be pcrformed. In that casc cxecute initial settinS with instructions.
Codc
RS R,/W DBT
0 0 0 A A A A A A
lrwcr ordcr bit3-
t H$hcr odcr bits
-22-

(8)
Sets CG RAM address into the address counter in binary AAArq,rArd{ and then
data is written or read from the MPU for the C13 RAM.
Set DD RAM address
._ Htghcr order bits l,ow€r order bits
-
sets the DD RAM address into tre address counte! in binary A./4'JA,r4,./dqA Data is
then written or read from the MPU for the DD RAM.
Howwer, for l-line display module fuq,/q'rdqi./M is "00" - '?F" (hexadecimal)
for 2{ine display module AAAAAAA is 't00" - "27" (hexadecimal) for the fint
line and "40" - "67" (hexadecimal) for the second line.
(9) Read busy flag and addrrs
RS R,/W DBT
DBo
Codc
0 I ts A A A A A A
-
Reads the busy flag (BF) that indicates the system is none internally operating
by a previously received instruction. BF = I indicates that internal operation is in
progress and the next instnrction will not be accepted untit BF is set to ..0".
Check the BF status bcfore the next write operation.
At the same time the value of the address counter expressed in binary
AAAAAAA is r€ad out. The address countcr is used by both CG and DD RAM and
its value is determined by the prcvious instnrction. Addrcss contents are the same as
in items (7) and (8).
(10) Write data to Cc or DD RAM
RS R,/W DBT
Codc
0 D D D D D D D D
-
Higher ordcr bits l.oscr order bits -
Hthcr order bir Lowcr ordcr bits-
-23-

Writes binary 8 bits data DDDDDDDD to the Ci|3 or DD RAM.
The previous designation determines whether t}re CG or DD RAM is to b€ read
(CG RAM address set or DD RAM address set). After a write the entry mode will
automatically increases or decreases the address by l. Display shift also follows the
ertry mode.
(l l) Read data from CGoTDD RAM
RS RzzW DBr
DBo
Code
I I D D l) D D D D D
- Higher ordcr bits L,ower ordcr bils -
Reads binary 8 bits data DDDDDDDD from the CG RAM or DD RAM.
The previous designation detemines whether the CG or DD RAM is to be read.
Before entering the read instruction, you must execute either the CG RAM or
DD RAM addres set instruction.
If you don't, the first read data will be invalidated. When serially executing the
"read" instruction the next address data is normally read from the second read.
The "address set" instruction need not be executed just before the "read"
instruction when shifting the cursor by cursor shifl instruction (when reading out
DD RAM). The cusor shift instruction operation is the same as that of the DD RAM
address set instruction.
After a read, the entry mode automatically increases or decreases the address by
l. However display shift is not executed no matter what the entry mode is.
Note: The address counter (AC) is automatically incremented or decremented by I
after "write" instructions to either CG RAM or DD RAM. RAM data
selected by the AC cannot then be read out even if "read" instructions are
executed.
The conditions for correct data read out arc: execute either th€ address set
instruction or cursor shift instruction (only with DD RAM) or the execution
of the "read' instruction from the second time when the read instruction is
serial.

2.2 Examples of instructions
(l) Using DMC l6l06C DMC 16129, DMC l6l068 (l-line display)
No. lnttruction i Displ.y Op.ration
Powcr upply ON
( lnitializ,edby )
\ lnt€rnal resct circuit /
ffi
Module is initislizcd.
No display appean.
2
Function s€t
RslRAvlDB? -
I lo o t I O 0..
Displey ON/OFF Control
DBo
Sets interface data length and
selects 5 xTdots l.linc dis
Play
Turns on display and corsor.
No display .ppears
R Sl R/w
DBr
0 000 t I t 0
4
Entry mode set
-
RAv
DBr
00000tr0
Sels modc to incrcment the
address by one aod to shift
cursor to the right at the time
of write to intcrnal RAM.
5
Writc data to CC/DD RAM
L-
Writes "L" cursor is incremented
and moves to the
right.
t | 0 l0 r 0 0 I r 0 0
Writc d8la ro CC/DD RAM
Writes "C"
6
R/Sl RAv
DB,I
0 t 00001I
LC_
7
8
Write to data to CG/DD RAM
R Sl RAv DBt
l0rl0
I,CD MODULE DMCI5
flrites "6" cursor dilaDD€ars.
DD RAM address is tbH)
-25-

No. lniruction Oi.phy Ogantiort
DD MM addrcs sct
Cursor sppcan st homc Position
9
P.s RAr On, - DBol
0 0 r 0 0 0 0 0 0 0l
I.]CD MODULE DMCI
Cursor/'Di:phy rhift
Entire display Crifts to lh€
right by on€ digit.
t0
RS Rp br, - DB"l
0 0 o 0 0 r r t.'l
IJCD MODI'LE DMC
Cursor/Displry shift
Entire display d fts one digit
to thc right.
ll
RS R^[r bg, - og"l
0 0 0 0 0l I t..l
ICD MODTJLE DMC
Display ON/OFF cunol
Entirc display disappcats.
l2
RS R/w On' - DBol
0 0 0 0 0 0 l 0 0 0l
Display ON IOFF
Entire display tcrpp€crs.
t3
RS R/l||
ry, :-----ry1
0 0 000011r0
Cursor Homc
lt
I
ll r an vnnl TI F nMa 16 I
Returns both cursor rnd
display to origind po3ition.
l4
RS R/w
[or' _ os"l
0 0
Display clear
II
l0 0 0 0 0 0 t 'l
L/CD MODI I,E DMCI6
Clcars cntire d[play cxcept
cursot.
l5
RS
R/wIrl---_"tl
0 0 lo o o o o o o tl
l6
-26-

(2) When employing DMCI 6207, DMCI6230 (2-line display)
No. lNtruction Oi'pl!y Op.'ttion
Powcr spply ON (lnitialized by
intcmsl circuil)
Modulc is initialized.
I
RS RAv DBt DBo
2
Funclion Set
lo o r r i ...
Sels the interfac€ data lenglh
to 8 bils and sclccts 2-linc dis.
play and 5 x Tdot chtractcr
lont.
Display ON/OFF control
Turns on disolav and cursor-
No display aip&rs.
.'
RS RAv DBr DBo
0 0 0 000 t r r 0
4
Entry mode set
RS RAv DBr - DBo
l0 0 0 0 0 I I ol
Sets mode to incremcnt
addr€s by one and to shifi
the cursor to the right al the
time of write to intcmal
RAM
5
Writ,
RS
data to CG/DD RAM
Rnil
o I o ol-r;;l
L-
Writcs "L".
Cursor is incremented bv one
and shifts ro thc right. '
wrirc data ro CG/DD RA
Writcs "C"
6
RS R/W DB"
0 t 0 0 0 0 t ll
IrC-
7
Writc data to CG/DD RAM
Writcs "6"
I
RS Rnr DBr DBo
I 0 00t t0t t0
IJCD MODULE DMCI6
-27-

No. lniruatbn OirpLv Opcretion
9
Scr DD RAIrI addr.s
re
l*sfwwl on,
oso I
LCD MODT'LE DMCI6
Scts RAM address so that thc
culsor is positioncd sl thc
hesd of the 2nd linc.
wrilc darr ro CG/DD IIAM
Whirc "3"
t0
IJCD MODULE DMCI6
f'lr To o ' i;ti ' I
writc darr to CG/DD [lAM
Wriles "2"
3-
ll
I D MODT,'LE DMCI6
3L
l2
wrirc dara to CG/DD RAM rddrcs
Writes "S"
l3
l4
t5
f'ToToo'orotol
Sct DD/RAlrl addrcs
wl
@l
Clcer disphy
ffi
@l
|JCD MODULE DMCI6
32 DtGtTS, 2 LTNES_
lcD MODTTLE DMC 16
32 DrGrTS, 2 UNES
Movcs cursor to originel
position
Rctum both displry end
cursor to lhc original posirion
t6
-24-

(3) When DMC 40440 is employed (4-line display)
No. lnrtructioo Dirpl.y Oecntion
I
Powcr supply ON (lnitislbrtion)
ts RS RAv
,ttlt'"1,
ffi
Inilidizcd by internal reset
circuit.
2
Function set
IJ RS R/w
I 0 0
Sets thc controller of th?
higher order 2-linc to 8.bit
inrerfrce data length and 5x7
dots chrracter font.
DB? -
00tt
l.
p&
J
Function set
ts RS R/w
0 0 0
Scrs thc conrroller of the
lower ordcr 2-line to &bit
inrerf.cc data length and 5x7
dors chrractcr font.
DBr - DBo
00Illoi.
4
Display ON/OFF control
LS RS RAv
0 0
DBr
0000tt!0
)
Display ON/OFF control
Is RS R/w
0 0 0
Tums on the display of thc
lower order 2-line and turns
off thc cursor.
DBt - DBo
6
Entry mode set
ts RS Rnr
0 0
00000tt0
For thc highcr order 2Jinc,
addrcs is incremcnted by onc
al the time of write to
intcrnd RAM and cursor
shifts to thc ri8hr.
Displsy is nol fiifted.
Turns on thc display of
highel order l.line and the
cursor. No display appears-
-29-

llo. lffitruction Dir0l.V Op.r.tion
7
Entry mode sct
IJ RS Rnil
0 0 0
For thc lovcr ordcr 2-linc,
addrcas is incrcmcntcd by onc
and shifts thc cursor to the
right !t thc time of w te to
intcrnal RAM.
tB? - u!
00000tt0
8
wfire ro CG/DD RAM
ts RS RAv
I 0
L-
Writcs "L"
Curor is incrcmented by onc
and is ddftcd to the right.
9
Wrircs'0"
l0
IJ RS R^r,
I 0
I-CD MODULE DMClt{)
DBt - DBo
0 0 r l0 000
lt
Sct DD RAM addrcs
l5 RS RAV
0 0
I I./CD MODULE DMCITO I
Scts addrcs so that cur:or
comcs to thc lst digir of thc
2nd linc.
lDBr - too
I I I 0 0 0 0 0 0i '
Wrirc dara to CG/DD RAM
l2
LS RS RAV
I 0
I.CD MODULE DMC/O
l-
tBt - Dl
00110001
-30-

Writc d.t. to CC/DD RAM
ls RS RAP
I I 0
I.CD MODI.'LE DMC4O
160 DlclTs,4 LrNEs -
,6t - Dl
DBt
0r0r00tl
DBo
Disphy ON/OFF control
ts RS R^l|
I 0 0
LCD MODULE DMC4O
160 DIGITS. 4 LINES
The highcr ordcr 2Jinc is
OFF
DB' - DB-
0000t100
ts RS RI['
0 0 0
DBr - DBo
r0000000
IJCD MODULE DMC4{)
160 DIGITS. 4 LINES
DD RAM .ddrcss is ict 8t the
lst digir of thc 3rd linc.
Diapley ON/OFF control
t5 RS Rlfl
0 0 0
,lt? - Ul
0000ttt0
I.cD MOIX,LE DMC4O
160 DrGrTs. 4 LTNES
Thc cursor is ON .t thc lst
digit of the 3rd linc.
Wdrc dlt| to CC/DD IIAM rddGls
ts RS R/w
0 0
,!'-Dt
0r00r000
l.jCD MOIXTLE I)MCIO
160 DrGtTs. 4 L|NES
H-
-31-

ttlo. lnrtruction OtuphV Op.r.tion
Wrirc data io CG/DD RAM
W tcs "l".
l9
rs RS RAV
0 0
DB, - Dl
0100r001
lCD MODTJLE DMC4O
I60 DIGTTS, 4 LINES
Ht-
20
Writc drta to CG/DD IiAM
Writcs "T".
2l
ls RS R^v
0 I 0
tE1 - tt
DBt
o t 0 r 0 t 00
DBo
lfD MODULE DMC.I0
I60 DIGITS,4 LINES
HIGH CONTRAST-
'r)
Sel DD RAItt rddres
ts RS RAf,
0 0 0
DBr
I
- DBo
r 000000
I]CD MODULE DMC{I
160 DlGlTs.4 LINES
HIGH CONTRAST
Thc cu$or movcs to the l st
digit of the 4ft linc.
Writc data to CG/DD IIAM
Writcs "W'.
?3
rs RS R/1ll
0 I 0
DBt
0t0l0tt
DBo
I
LrCD MODULE DMC,I0
D'GITS. 4 L'NES
HIGH '60
w_
Writcs "l".
24
t5 RS Rnil
0 I 0
t6t - Dl
DBz
0r00l0ol
DBo
IJCD MODULE DMC.|0
160 DICITS,4 LINES
HTCH CONTRAST
wt_
-32-

t{o. lnrlructaoi Oi:phy Oponrftn
25
Writcs "8".
26
IJ RS Rtf
0 I 0
DBr - DBo
ffi
|JCD MODULE DMC4O
160 DtGtTs. 4 LTNES
HICH CONTRAST
WIDE VIEWING ANGLE-
Disphy ON/OFF control
Tums thc cursor off.
IJ RS nyw
0 0 0
DBr -
0000r
t0
pBo
0
l,CD MODULE DMC.O
160 DtGtTs, 4 UNES
HIGHCONTMST
WDE VIEWING ANGLES
28
Sct DD RAIiI rddres
IJ RS R/\v
0 0
rcD MODI.'LE DMC4O
I60 DIGITS, 4 LTNES
Scts DD RAll .ddrcs to the
I st linc.
DBz
I
- DBo
0000000
HIGH CONTRAST
WIDE VIEWINC ANCLE
29
Disphy ON/OFF control
Is RS R/a,
I 0 0
I.CD MOIX'LE DMC4O
160DrGrTs.4 UNES
Turn thc cursor on at th€ lst
digft of rhc l st linc.
DBt
00
DBo
HIGH CONTRAST
WIDE VIEWING ANGIJ
30
-33-

(4) In case interface data length is +bit (DMC 16207)
I{o. lnttruction Datpl.y Op.r.tion
I
Powcr spply on (initidized by
intcmal circuit)
RS R^[, DBt
D&
Modulc is initirlizcd.
2
Function lct '
RS Ril DBt D&
0 0 0 0 0
Sct the intcrface dats length
ro 4 bits-
Sincc modulc h8s bccn 8 bits
by initid sct, instruction is
rcquircd only onc time.
3
Function sct
RS RAv DBr D&
0 0 0 0 0
0 0 I x X x
Sct the intcrface data ldngrh
ro 4 birs md sclccr 2-line
diglay and 5 x 7.dol charactcr
font.
Since il is opcrstcd es 4 bils
from her€, re-sct is ncc€sssry.
Display ON/OFF control
Turn on display and cursor.
No display appcar.
4
RS Rnil DBt
0 0 0000
0 0 I ll0
D&
5
Entry modc scl
RS RIr DBr
D&
0 0 0 0 0 0
0 0 0rl0
Set mode to incrccmcnt
addrcs by one and drift the
curior to lhc night st the
timc of writc to internal
RAII.I,
6
Write data to CG/DD RAM
RS Rr DBt D&
I I 0r00
I 0 tt00
r-
Write "U'.
Cunor is incrcmentcd by one
rnd shift to rhc right.
-u-

3. OPTICAL CHARACTERISTICS
. Vcc . s.t'v t 5*, T. = 25'C
(A) An8l. , md dcfinition of , (B) Defirilion of vicwing .ndcs , r snd r,
9
g3 !
z
6
via*|l A.,L
(c) Dcfinitioo of contr"l ntio (ctiTb o-*
(D) Dcfrnifion of optical rrsponlc tirh.
.: a.iahit- h i.i ..{..r ti.l
b: l.iariftn In .t.cr rid
-35-

4. ELECTRICAL CHARACTERISTICS
4.1 Abrolute motimum rttingF
MODULES EXCEPT FOR DMC 1643:I,
DMCAr€4
Vcc = 5.0V x S%.Ta= 25"C
It6m Symbol Spocr, Valuc Unit Remarks
Vcc - Vss 0- 7.0 v
Supply voltage
-Vcc
- Vee' 0 - 13.5 v
lnput voltage vi Vss - Vcc v
Operating Temperature Ta 0- +50 "c
Storage Temperature Tstg -20- +70 'c
DMC 1643it, DMC Zt'f34
Vcc = 5.0V r S%,Ta= 25'C
Item Symbol Speca. V.lue Unit Rcmarkr
Vcc - Vss 0- 6.s v
Supply Voltagp
Vcc - Vee 0- 6 v
Input Voltage vi Vs- Vcc v
Op€nting Temperature Ta 0- +50 'c
StoragF Temperature Tstg _29- +7O "c
Notc: when module is used above absolute maximum ratingp, the intemal LSI may be
permanently destfoyed. For normal operation, using the module under electrical
characteristic conditions is strongly recommended. Bcyond these conditions the
module will malfunction and suffer decreascd reliabiliB'
Vcc
(+5V)
vcc
DllC nodulc
-36-

42 ELctric.l ch.ractristica (Vcc - 5V r 5%, Ta - 25.C1
Input Voltage
Output Voltage
(TTL)
Output Voltage
(cMos)
lbm Symbol Coditiom
Specs. Valuc
Mt'TTyp.TM"*
Hish Vnl )t
Vcc v
Low VtrI -0.3 0.6 v
Hish VoH I -Ios = 0.205mA 2.4 v
Low Vor I bt = l.2mA 0.4 v
Ilish Von 2
-lon = 0.04mA 0.9 Vcc v
[,ow Vor 2 br = 0.04mA 0.1 Vcc v
Unit
Not: E signal terminal is not puled up. Be sure to make
module.
..L" when using the
4.3 Timing char.sE inaca
(l) Write operation
RS
(LS)
2.0 V 2nV
oav
oav
uv
oav
2av
oav
Fig I Bus write operation Scquence.
(Writing data from MPU to Module)
-37-

(2) Reld opctrtion
20v
08v
Fig" 2 Bw Rcrd Opcntion Scqucna
(Rcrdiry out &te fmm llodule to MPU)
-38-

(3) Timing characteristics of each drawing (Vcc = 5.0V r 5%, Vss = 0V;
Ta=0-50"C)
(a) Write timing characteristics (Fig. I )
Itom
Symbol
Specs Value
Min
Max
Unit
Enable cycle time tcyce 1000 ns
Enable pulse width | "High" hvel Ftl/EH 450 ns
Enable rising, falling time tE, Gf 25 ns
Set up tirne I RS, R^V-E tAS 140 ns
Address hold time tAH l0 ns
Data set up time tDslr' r95 ns
Data hold time IH t0 ns
(b) Read timing characteristics (Fig. 2)
Item
Symbol
Specs. Valuo
Min Max
Unit
Enable cycle time tcyce t 000 ns
Enable pulse width | "High" levet PVrtH 450 ns
Enable rise. fall time E!, Ef J< ns
Set up time I RS, R/W-E t^s 140 ns
Data delay time ODR 320 ns
Date hold time tr 20 ns
-39-

5. OOIiINECTION DIAGRAiI WITH ]ulPU
5.1 Connection with Z€0
z@
MPU
AO
AI
A?
DO
D1
IORQ
ND
W-R
ir L
t-
IF
Chip
IL
IL
tl
tf
tf-
-T'l- -1/
+5V
s
RS
E
DMC modulc
R/W
tl
\
DBO
DB?
Conn€ction wi$ 8(B5A
to/tu
RD
WR
DMC modulc
sl
ALE
Ar5
ie
A90
AD?
-{0-

53 Connectlon with MC 68(Il
Ar CS, PA:
Att
CSr
PAt
Al RS,
,\ RST PAT
|1il
IA ). :'" Mc6szr
Dr- Dr
PB!-PB,
RS
n/w
E DMC lrrodurc
DBl-DB1
MC 6800
O2
AE
Ar
R/W
Do -Dr
-1\_
-1,1
E
I
DilC Moduh
RS
R/W
DBt-DBr
5.4 Gonnsction whh MC 68tF
E
Ar
A.
R/w
l
O.-Prl
tr
t
E
DllC Modulc
RS
R/W
D81-DB1
-41-

6. SPECIAL SPEC]FICATIONS
6.1 EL 6ad( lightl specafacttaom for DMC r.ri€s
Note ( 1 ) These specifications are for explaining general characteristics of EL.
Detailed data are available from OPTREX representative for cach model to assist
usen. Please contact the repr€sentative for the data
Not (21 Thb product has bean derreloped with the cooperation from NEC Corporation.
a Characteristics
e This is a surface light source using organic film as subctrate and packaging material.
. With the adoption of new matcrials and production process, the thickness is reduced to 1.3
mm Max. (Electrode portion is 1.5 mm Max.) making it suited for high density mount.
o Color emission is blue green.
o Driving voltage can be selectcd from a wide range of 60 - tflD Hz and AC l50V Max.
Also with the help ofan inverter, voltage increase from l.SV battery is casily achieved.
( I ) Absolute maximum ratinSs
Operating Voltage
Operating Temperature Range
Storage Temperature Range
AC l50V RMS
-10- +sCC
-30 - +60'c
-42-

(2) Electrical characteristics (Color emission: Blue green)
i
F'.0
T
I 0.1
0.6
t
a-
||tr: .t
E
r0E
I
iE
T.it'rrt t-&lghtr-
5 t-l--T--T-
$''l-ffi
5tl
-ffi,
0.a
ao
a0
0-?
4
20
l00V/50Xr
,/.-'-'1----'-'
E
!
t 200
I
E
6
t!{l
rtof.g.--&ita-. O!.d..ittt
E
a
Eo,
o-zoa 20 a0 t0
rGrp.rsrrr. (t)
ro
'II I
I t
o'
-43-

(3) Lifechatacteristics
f,
e
e
.F
EL U|. fht Clt ct ali6
lrnbdr Cond'tio.i 20'C 7oq6 Fr
----{o tr.n \toi.g./fitorict (}ttl
r00v/soH,
d
!!
J I 3 I zId
=
EL Ui. TkF Chf,ratblbr
900
(5) EL substrate driving power source
ilodel No.
lnvert€i
Model No.
lnverter
DMCI6I06AEL 032-45 DMC2OZ I 5EL
032-46
DMCrSloSCEL 032-45
DMCI6IITEL 032-45
DMCI6I28EL 032-45
DMCI6I ZgEL o32-45
DMC2O434EL
D32-43
DMc24r38EL I
D32-46
DMC24Z27Et
D32-46
DMC32I3?EL
D3?-43
DMCI6IOSBEL
032-45
DMC322ISEL D32-43
Dircr6207EL D32-45
oMc40l3IEL 032-43
DMC4O2ISEL
DMCI6Z3OEL D32-43
032-43
DMCI6433EL
D3?-43
-44-

62 HighrdbifityT.dficdons
Among thc DMC scri.s, some of the modules are mede to meet high rcliability specs., using
liquid crystal usable within a wide range of tempcr.hre. Those modutes havc en .'H" in thcir
type names to distinlgish from the others.
Hocrevcr, s moduhs of high reliability usc liquid crystal and pouler soutsc of different
charactcristics ceution is invitcd whca putting thern to use.
(l) Opcrrtiry Tcmpsaturc -20"C - +7dC
(2\ StoraSp Tcotpanture -30"C - +8dC
Nolt: Evcn in lhcrc "H" modulcs, the specilications for EL Backtight are stand.rd lcvel
G.42- 44r.
-45-

6.3 Exampler of TemperatuE Oompenration citctriG (Only for referuncel
(Al 1/8 Duty -
1/3 Bias
vdd
Fig. 1 F.s. Fig.2:
Thermistor : Rth(25'C)= lSlkohml , B= 4200tKl
Resistors : Rp= 30tk-ohml , Rs = 6.8[k-ohml , Rm = 3.3[k'ohtn]
Transistor : PNP TyPe
Vdd : 0[vl , Vss : -5[Vl (loeic SuplY)
Vz : -8[V] (-7.8 to -8.2[V] )
Vee (Vz [Vl , Rz = (Vz-Vee)/S [kohm]
Rp= 30 lkohml
Rs= 6.8 lkohm]
grn=3.3 [kohml
------ lNominal curve
- - --- f -O available
-------- J area
Numeric curve
volVI
0
40
Rth (25"C) = l5 lkohm]
B = 4200 IKI
-20 0 20 40
Ta["CI
+ Specifications ar€ subjcct to change without notice.
-46-
Ta["C]
VolVl
-20 6.56
-10 6.50
0 6.40
l0 6.26
20 6.09
30 s.8E
40 5.67
50 5.47
60 s.29
70 5.1 5

(Bl U16 Duty -
vdd
Vee
1/5 Bias
Rz
Yz
Rth:
I
I
( nslI
I
R'n:
1
lr
:l
t1 Rp Vo RL<
I
Fig.2
)
t\
Module
Thermistor : Rth (25"C) = lSlk-ohml ,B=4200tK1
Resiston : Rp = 51911-onml , Rs = 8.2tkohml , Rm =3.9[k-ohm]
Transistor : PMType
Vdd : 0[Vl , Vss : -5[V] (Logic Supty)
Yz : -11IVI (-10.725 to -t 1.2?5tvl)
Vee (Vz [VL Rz = (Vz-Vee)/S [k-ohm I
Reference
n
Rp= 510 [kohm]
Rs= 8.2 tkohml
Rm=3.9 [kohm]
- -- ---l
- ---land available
---- ---J atea
Nominal curve
Numeric curve
VoIvl 8
Ta['C] VolVl
Rth (25'C) = l5 lk-ohml
B = a200 tKl
4
40 -20 02040
Te["Cl
r Specifications are subject to changp without notice.
60
-47-
80
100
-20 10.0r
-10 9.U
0 9.60
l0 9.28
20 8.89
30 E.49
40 8.r r
50 7.79
60 7-53
70 7.33