Itanium Performance Insights from the IMPACT Compiler

Hot Chips 13
August 21, 2001
Itanium Performance Insights
from the IMPACT Compiler
J. Sias, M. Merten, E. Nystrom, R. Barnes,
C. Shannon, J. Matarazzo, S. Ryoo,
J. Olivier, W. Hwu
IMPACT Research Group
Coordinated Science Laboratory
University of Illinois at Urbana-Champaign
http://www.crhc.uiuc.edu/IMPACT/
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
Itanium Development History
August 21, 2001
Intel and Hewlett Packard
Intel/HP
alliance
input
from
UIUC
Intel
begins
prototype
compiler
based on
IMPACT
Intel/HP
announce
Itanium
Intel
commercially
licenses
IMPACT
Intel donates
prototype
compiler and
system
to IMPACT
Research
Intel/HP
publically
release
Itanium
processor &
compilers
‘87
‘95
‘96 ‘97 ‘98 ‘99 ‘00 ‘01
‘02
IMPACT
ILP
compiler
born
Research
Partnership
with HP Labs:
predication &
speculation
Advanced
control flow,
predication &
speculation
balancing
research
Focused
Itanium
development
begins at
IMPACT
Research
General
spec.
support
add to
linux
kernel
University of Illinois at Urbana-Champaign
Results
comparable
to Intel ecc
achieved
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
Itanium Architecture Overview
August 21, 2001
• Itanium design goal: enhance scalability of parallelism by
moving complex decisions to the compiler
– Bundling: enables static scheduling by communicating instruction
parallelism
– Predication: allows compiler to optimize across multiple paths by
providing an alternative to control flow
– Speculation support: allows compiler to select specific instructions
for early execution
Original Control Speculation Predication
...
BR
If addr != 0 If addr == 0
r = [addr] ...
r = [addr]
...
BR
If addr != 0 If addr == 0
If p: use r
r = [addr]
...
p =
(addr != 0)
If !p: ...
use r
use r
...
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
Itanium Compilation Landscape
August 21, 2001
• Increased reliance on the compiler for performance
– Explicit control of the architecture: realities of modern
microarchitecture have become visible at software level
– Particular problems: effects of runtime uncertainty
• Control resolution, variable memory latency, etc.
– Solutions from EPIC/VLIW research
• Memory disambiguation, profiling
• Static scheduling, control speculation, predication
Applicability
Public/
Proprietary
Peephole
opti level
ILP opti
level
Extensibility
gcc
Very High
Public
Low
Very Low
Low
ecc
High
Proprietary
High
High
High
IMPACT
Medium
Future Public
Medium
Very High
Very High
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
August 21, 2001
IMPACT Compiler
• IMPACT compiler supports ILP compilation and research
– Extensible framework for easy implementation of new optimizations
– Versatile and pervasive intermediate representation (IR)
– Comprehensive predicate-aware dataflow and predicate analyses
– Direct analysis from IR at most stages of compilation
– Advanced interprocedural pointer analysis
Profiling
Machine Description Relied
Upon Throughout
Prepass
Scheduling
Function
Inlining
Traditional
Optimization
Predicate
Formulation
Predicate-Aware
Classical and
ILP Optimization
Instruction
Selection
Register
Allocation
Interprodecural
Pointer Analysis
Early Utilization of
Predication
Itanium Performance Insights from the IMPACT Compiler
Many Optimizations
Utilize Control
Speculation
Meticulous Static
Scheduling
Postpass
Scheduling
IMPACT

Hot Chips 13
SPECcpu2000 Ratio Comparison
August 21, 2001
164.gzip
500
256.bzip2
300.twolf
400
300
200
100
0
175.vpr
impact
ecc
gcc
181.mcf
255.vortex
186.crafty
254.gap
197.parser
Dual processor HP i2000 Itanium 800 MHz with 2MB L3 cache
linux kernel 2.4.7 with PMC patch, gcc 2.9.6, ecc 5.0.1 beta
(ecc measurements not official Intel results)
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
Cycle Accounting Breakdown
August 21, 2001
Execution time / SPEC reference time
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Pipeline flush
Memory
Dependency
Unstalled execution
0
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
164 175 181 186 197 254 255 256 300
Measured machine execution cycles using performance monitoring counters
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
Performance of Memory Hierarchy
August 21, 2001
Satisfied accesses x latency (1E12)
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Main memory
(est. 80 cycles)
L3 cache
L2 cache
L1D cache
L1I cache (demand)
L1I cache (prefetch)
INT REQ
L1 I Cache
16KB
4-way
32B lines
2 cycles
L1 D
Cache
16KB
4-way
32B lines
2 cycles
FP REQ
MISS
MISS
L2 Unified
Cache
96KB
6-way
64B lines
6 cycles int
9 cycles fp
MISS
L3 Unified
off chip, on
package
cache
2MB
21 cycles int
24 cycles fp
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
164 175 181 186 197 254 255 256 300
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
Approaches to Control Speculation
August 21, 2001
General Speculation
Write Value Into Register
Hit
Valid
Inexpensive
Moderate
Expensive
Result
ld.s
Check
DTLB
NaT
Page
Walk
VHPT
OS
Write NaT Into Register
Check
Page
Table
Not Valid
Missing
Load
Page
Except on
Consumption
Sentinel Speculation
Write Value Into Register
ld.s
Check
DTLB
Write NaT
or Value
Into
Register
chk.s
NaT
ld
Check
DTLB
Hit
NaT
Page
Walk
VHPT
OS
Check
Page
Table
Valid
Missing
Not Valid
Load
Page
Except
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
Architecture and OS Support
August 21, 2001
• IPF allows OS to mix and match general and sentinel
speculation models
• Linux kernel modifications for general speculation
– Basic support (system-wide general speculation): modify Default
Control Register (DCR) not to defer transparent exceptions
– Basic support caused page fault on every speculative NULL
pointer access
– Solution: install page 0 translation as a NaT page
– Advanced support (selective general speculation): Bit in binary
header indicates presence of recovery code. If no recovery code,
ED bits in page table entries are cleared, overriding the DCR
setting, so that no serviceable faults are deferred
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
August 21, 2001
Cycle Accounting Breakdown Revisited
Execution time / SPEC reference time
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Pipeline flush
Memory
Dependency
Unstalled execution
0
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
164 175 181 186 197 254 255 256 300
Measured machine execution cycles using performance monitoring counters
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
August 21, 2001
Hyperblock Transformation
CB6
CB5
Example from 164.gzip deflate()
CB10
P
Predicate
Definition
CB93
CB94
CB133
CB140
• Commonly executed code
pulled together into a
straight-line sequence
P
P
P
P
P
P
Implicit NOP
Explicit NOP
CB166
CB141
CB142
CB143
• Serial branch execution
replaced with parallel
predicate evaluation
P
P
P
P
CB157
CB158
• Compromise between ILP
and code size
P
P
P
P
P
P
P
66%
1%
CB160
CB159
– Bundling reduces explicit
horizontal NOPs
P
P
0%
CB165
CB168
– Interlocking reduces explicit
vertical NOPs
P
P
0%
33%
CB181
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
Branch Effects of ILP Transformations
August 21, 2001
• ILP compilation eliminates branches
– Predication and branch combining
– Loop unrolling
1.0
0.9
0.8
0.7
Taken mispredict
Not-taken mispredict
Taken
Not-taken
• Reduction in total dynamic branches
• Proportionally fewer taken branches
• Reduction in mispredicted branches
0.6
0.5
0.4
0.3
0.2
0.1
0.0
basic ILP basic ILP basic ILP
164.gzip 175.vpr 255.vortex
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
Comparison of Branch Behavior
August 21, 2001
7.E+10
6.E+10
5.E+10
Not-taken incorrect
Taken incorrect
Taken correct
Not-taken correct
4.E+10
3.E+10
2.E+10
1.E+10
0.E+00
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
gcc
ecc
impact
Branches
164 175 181 186 197 254 255 256 300
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
Challenges and Future Directions
August 21, 2001
• Profile dependence and accuracy
– Getting profile into build systems
– Transparent runtime data collection and re-optimization, making more use of
the Itanium performance monitoring counters
• Effectiveness of ILP compilation algorithms
– New algorithms to increase both aggressiveness and stability of speculation
and predication
– Program level ILP transformations
• Memory subsystem improvements
– More efficient pointer analysis algorithms
– Memory data flow analysis and optimization
• More results are being derived for presentation at Microprocessor Forum
Itanium Performance Insights from the IMPACT Compiler
IMPACT

Hot Chips 13
August 21, 2001
Acknowledgements
• Former IMPACT members
– David August, Ben-Chung Cheng, Daniel Connors, Kevin Crozier, Brian
Deitrich, John Gyllenhaal, Richard Hank, Teresa Johnson, Dan Lavery, Scott
Mahlke, Le-Chun Wu
• Intel Itanium Team
– Carole Dulong, John Crawford, Dan Lavery, Steve Skedzielewski, Jim Pierce
• HP Itanium Team
– Richard Holman, Vatsa Santhanam, Carol Thompson, Richard Hank
• HP Labs PD Team
– Bob Rau, Mike Schlansker, Vinod Kathail, Scott Mahlke
• HP Labs Linux Team
– Brian Lynn, David Mosberger, Hans Boehm, Stephane Eranian
• HP Philanthropy - 9 i2000 Itanium machines, expedited
– Karen Fontana, Tony Napolitan, Ralph Hyver, Chris Hsiung, Rob Bouzon
• Intel - 2 alpha/beta Itaniums
– Carole Dulong, John Crawford
Itanium Performance Insights from the IMPACT Compiler
IMPACT