System Management Bus (SMBus) Specification, version 2.
System Management Bus (SMBus) Specification, version 2.
System Management Bus (SMBus) Specification, version 2.
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<strong>System</strong> <strong>Management</strong> <strong>Bus</strong> (SM<strong>Bus</strong>) <strong>Specification</strong> Version <strong>2.</strong>0<br />
3.1.3. High-Power DC specifications<br />
V DD<br />
R P<br />
R P<br />
R<br />
*<br />
S<br />
R S<br />
R S<br />
R S<br />
R S<br />
R S<br />
SM<strong>Bus</strong><br />
device<br />
SM<strong>Bus</strong><br />
device<br />
SM<strong>Bus</strong><br />
device<br />
SMBDAT<br />
SMBCLK<br />
*<br />
All R S<br />
are optional<br />
Figure 3-4: SM<strong>Bus</strong> branch with multiple devices attached<br />
High-power SM<strong>Bus</strong> is specified below. These higher power specifications provide the robustness<br />
necessary, for example, to allow SM<strong>Bus</strong> to cross the PCI connector, thus allowing SM<strong>Bus</strong> devices on PCI<br />
add-in cards to communicate with other devices on both the system board and other PCI add-in cards in the<br />
same system. These higher power electrical specifications are an alternative to the lower power<br />
specifications stated above and may be used in environments where necessary. Some parameters are<br />
explained further in the sections below.<br />
Symbol Parameter Limits Units Comments<br />
Min Max<br />
V IL SM<strong>Bus</strong> signal Input low voltage - 0.8 V<br />
V IH SM<strong>Bus</strong> signal Input high voltage <strong>2.</strong>1 V DD V<br />
V OL SM<strong>Bus</strong> signal Output low<br />
- 0.4 V @ IPULLUP<br />
voltage<br />
I LEAK-BUS Input Leakage per bus segment ±200 uA<br />
I LEAK-PIN Input Leakage per device pin ±10 uA<br />
VDD Nominal bus voltage <strong>2.</strong>7 5.5 V 3V to 5V ±10%<br />
I PULLUP Current sinking, VOL = 0.4V 4 mA<br />
C BUS Capacitive load per bus<br />
400 pF<br />
segment<br />
CI Capacitance for SMBDAT or<br />
10 pF Recommended<br />
SMBCLK pin<br />
V NOISE Signal noise immunity from 10<br />
MHz to 100 MHz<br />
300 - mV p-p This AC item applies<br />
to the high-power DC<br />
specification only<br />
Table 3: High-power SM<strong>Bus</strong> DC specification<br />
3.1.3.1. Capacitive load of high-power SM<strong>Bus</strong> lines<br />
Capacitive load for each bus line includes all pin, wire and connector capacitances. The maximum<br />
capacitive load affects the selection of the R P pull-up resistor or the current source in order to meet the rise<br />
time specifications of SM<strong>Bus</strong>.<br />
SBS Implementers Forum 16
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