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Kernel <strong>Structure</strong> (Cont’d)<br />
• MicroC/<strong>OS</strong>-<strong>II</strong> Interrupt<br />
MicroC/<strong>OS</strong>-<strong>II</strong> Interrupt Service Routine (ISR) <br />
C Inline C ISR <br />
.<br />
Interrupt <br />
‣ <strong>OS</strong>IntEnter(), <strong>OS</strong>IntExit(), <strong>OS</strong>IntCtxSW()<br />
YourISR:<br />
Save all CPU registers;<br />
Call <strong>OS</strong>IntEnter() or, increment <strong>OS</strong>IntNesting directly;<br />
if (<strong>OS</strong>IntNesting == 1) {<br />
<strong>OS</strong>TCBCur-><strong>OS</strong>TCBStkPtr = SP;<br />
}<br />
Clear interrupting device;<br />
Re-enable interrupts (optional)<br />
Execute user code to service ISR;<br />
Call <strong>OS</strong>IntExit();<br />
Restore all CPU registers;<br />
Execute a return from interrupt instruction;<br />
<br />
Embedded System Lab. <strong>II</strong> 30