24LC16B

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24LC16B FIGURE 7-2: RANDOM READ BUS ACTIVITY MASTER S T A R T CONTROL BYTE WORD ADDRESS (n) S T A R T CONTROL BYTE DATA (n) S T O P SDA LINE BUS ACTIVITY S A C K A C K S A C K N O A C K P FIGURE 7-3: SEQUENTIAL READ BUS ACTIVITY MASTER CONTROL BYTE DATA (n) DATA (n + 1) DATA (n + 2) DATA (n + X) S T O P SDA LINE P BUS ACTIVITY A C K A C K A C K A C K N O A C K DS20070M-page 10 © 2001 Microchip Technology Inc.
24LC16B 8.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 8-1. TABLE 8-1: PIN FUNCTION TABLE Name PDIP SOIC TSSOP MSOP Description A0 1 1 1 1 Not Connected A1 2 2 2 2 Not Connected A2 3 3 3 3 Not Connected VSS 4 4 4 4 Ground SDA 5 5 5 5 Serial Address/Data I/O SCL 6 6 6 6 Serial Clock WP 7 7 7 7 Write Protect Input VCC 8 8 8 8 +2.5V to 5.5V Power Supply 8.1 Serial Address/Data Input/Output (SDA) This is a bi-directional pin used to transfer addresses and data into and data out of the device. It is an open drain terminal. Therefore, the SDA bus requires a pullup resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz). For normal data transfer SDA is allowed to change only during SCL LOW. Changes during SCL HIGH are reserved for indicating the START and STOP conditions. 8.2 Serial Clock (SCL) This input is used to synchronize the data transfer from and to the device. 8.3 Write-Protect (WP) This pin must be connected to either VSS or VCC. If tied to VSS normal memory operation is enabled (read/write the entire memory 000-7FF). If tied to VCC, WRITE operations are inhibited. The entire memory will be write-protected. Read operations are not affected. This feature allows the user to use the 24LC16B as a serial ROM when WP is enabled (tied to VCC). 8.4 A0, A1, A2 These pins are not used by the 24LC16B. They may be left floating or tied to either VSS or VCC. © 2001 Microchip Technology Inc. DS20070M-page 11
Page 1 and 2: M 16K 2.5V I 2 C Serial EEPROM 24L
Page 3 and 4: 24LC16B 1.2 AC Characteristics AC C
Page 5 and 6: 24LC16B 2.0 FUNCTIONAL DESCRIPTION
Page 7 and 8: 24LC16B 4.0 WRITE OPERATION 4.1 Byt
Page 9: 24LC16B 7.0 READ OPERATION Read ope
Page 13 and 14: 24LC16B 8-Lead Plastic Dual In-line
Page 15 and 16: 24LC16B 8-Lead Plastic Thin Shrink
Page 17 and 18: 24LC16B ON-LINE SUPPORT Microchip p
Page 19 and 20: 24LC16B NOTES: © 2001 Microchip Te
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Page 23 and 24: 24LC16B “All rights reserved. Cop

24LC16B

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