LRDIMM - Powers up Transaction Processing - Inphi Corporation

LRDIMM -
Powers up Transaction Processing
White Paper

The latest innovation in server memory technology is the Load Reduced DIMM,
or LRDIMM. By isolating multiple DRAM ranks behind a single memory buffer, the
LRDIMM enables higher capacity and higher speed main memory in high-performance
servers, providing a significant increase in online transaction processing benchmark
performance.
Recently, IBM published TPC-E benchmark results showing a significant performance
increase in a server configured with LRDIMM memory compared to a server configured
with RDIMM memory. The LRDIMM modules used in the test featured the iMB02-
GS02A Isolation Memory Buffer (iMB) from Inphi Corporation. This paper provides an
overview of the TPC-E benchmark and its implications to on-line transaction processing
(OLTP), a summary of the results achieved by IBM, and a technical explanation of the
speed and capacity advantages of LRDIMM.
The TPC-E Benchmark
TPC Benchmark E (TPC-E) is maintained by the Transaction Processing Performance Council (TPC), with results
posted publicly on the TPC website at www.tpc.org. The TPC-E benchmark was created in 2007 to emulate the
large, complex databases and high online transaction processing (OLTP) workloads a brokerage firm faces in daily
operations. Results are independently audited and must be accompanied by a detailed disclosure report for full
transparency and accurate comparisons with other published results.
The TPC-E benchmark measures system performance on a simplified model of a brokerage firm, measured
in transactions per second between customers, the market and the brokerage firm, as shown in Figure 1. Ten
different types of transactions are included, resulting in updates and accesses to four different types of databases.
Customers initiate transactions to buy or sell securities, research the market, or inquire about their accounts. The
brokerage firm executes orders in the market and updates customer accounts.
Figure 1 – TPC-E Brokerage Firm Model
LRDIMM Powers up Transaction Processing 2

The TPC-E benchmark driver generates the transactions, submits them to the system under test, and measures the
rate of transaction completion. The four separate databases for customer, brokerage, market, and dimension data (such
as ZIP codes) are scalable to stress high capacity server systems, and created with realistic data based on information
from the U.S. Census Bureau and the New York Stock Exchange. For every 1,000 customers modeled there are 685
securities from 500 companies, belonging to 102 industries in 12 different sectors. Customers are separated into three
tiers, with each tier having a different average number of accounts and a different average trading frequency. Trades are
divided into five different transaction types, including Market-Buy, Market-Sell, Limit-Buy, Limit-Sell and Stop-Loss.
The end result is a realistic and scalable benchmark for comparing online transaction processing capabilities of various
systems, with results highly dependent on system memory capacity and memory access rates. LRDIMM-enabled
systems can improve both memory capacity and access rates, although the IBM TPC-E results quoted here utilize
systems with equal DRAM capacities. The improvement in transactions per second (tpsE) achieved here reflects primarily
the speed advantage provided by LRDIMM over traditional RDIMM memory.
IBM TPC-E Results Summary
A summary of the TPC-E results published by IBM is provided in Table 1. The RDIMM-equipped system tested in 2011
achieved a tpsE rating of 1,560.70 transactions per second. The LRDIMM-equipped system tested in 2012 achieved
a tpsE rating of 1,863.23 transactions per second, an increase of 19.38 percent, as shown in Figure 2. Both systems
were equipped with 512GB of DDR3 DRAM, and the initial database size in each case was at least twelve times larger
than the available main memory.
While some portion of the performance improvement could be attributed to differences between the servers and CPUs
used in each test, for memory-intensive applications such as the TPC-E benchmark the most important factor is memory
access speed. With the 16GB DDR3 RDIMM modules, the RDIMM system’s memory bus was limited to 800 MT/s or
1066 MT/s operation. The LRDIMM system utilized 32GB DDR3 LRDIMM modules, capable of running at 1333 MT/s,
even at 1.35V. Though not all attributed to the memory subsystem, this increase in operating speed is responsible for
improvement in the transactions per second while running the TPC-E benchmark.
Table 1: TPC-E Results, LRDIMM based system vs. RDIMM based system
Figure 2: tpsE Metric, LRDIMM vs. RDIMM
LRDIMM Powers up Transaction Processing 3

The results discussed above reflect the speed advantage of LRDIMM over RDIMM for systems with equal amounts of
DRAM installed, 512GB in this case, with LRDIMM running at 1333 MT/s compared to 1066 MT/s for RDIMM. For
benchmarks like TPC-E, and real-world applications where the database size is significantly larger than the installed
memory, LRDIMM would provide an additional performance advantage by allowing a higher amount of memory to be
installed at the same operational frequency, reducing the required hard disk access time by resolving more database
queries in DRAM.
The TPC-E benchmark also rates the server systems tested based on cost (in US dollars) per transaction per second,
or $/tpsE. By this metric, the LRDIMM system fared very well, ranking as the 8th lowest in $/tpsE out of 55 different
systems reported on the TPC website even using IBM’s list price of $4,599 at the time of the test. However, the price
of 32GB LRDIMM is coming down quickly. For example, IBM is now listing the 32GB LRDIMM for $2,099. Using this
price, the $/tpsE is approximately $196 thereby significantly improving the cost efficiency of the overall server as shown
in Table 2.
LRDIMM Overview
Table 2: USD $/tpsE
The LRDIMM enables the performance improvement observed in these TPC-E benchmark results by isolating multiple
ranks of DRAM behind a memory buffer such as Inphi’s iMB02-GS02A, as shown in Figure 3. In a traditional RDIMM
module the data bus signals from the host connect through the DIMM connector directly to the DRAM, placing multiple
DRAM loads on every data bit for multi-rank modules, including the DRAM loads from adjacent RDIMM modules in the
same memory channel. If four-rank RDIMMs are installed in a channel with two DIMM slots, each data bit would see
eight electrical loads, limiting signal integrity and system performance at higher speeds.
In an LRDIMM module the data bus signals from the host connect through the DIMM connector to the memory buffer,
which re-drives the data bus to the DRAM on the front and back sides of the module. The memory buffer thus isolates
the DRAM from the host, and from the DRAM on any adjacent LRDIMM module on the same memory channel. For
a system with two DIMM slots per channel, the memory controller would see two electrical loads (the memory buffer
on each LRDIMM), compared to eight electrical loads in an RDIMM system (the four ranks of DRAM on each RDIMM).
This load reduction enables the memory data bus to operate at higher speeds with no loss of signal integrity, providing
system performance benefits in memory intensive applications such as online transaction processing.
The LRDIMM’s memory buffer also buffers the command, address and control signals from the memory controller,
similar to the way that the register on an RDIMM buffers those signals. In systems with three DIMM slots per channel
the memory buffer enables additional increases in memory capacity, overcoming the traditional limit of eight chip selects
per channel through a feature called Rank Multiplication, allowing the use of three four-rank LRDIMM modules in a single
channel. Eight-rank LRDIMMs are also possible, with several module vendors having announced 64GB 8Rx4 LRDIMMs.
Figure 3: LRDIMM
LRDIMM Powers up Transaction Processing 4

Conclusion
DDR3 LRDIMM memory provides significant performance improvement over traditional DDR3 RDIMM memory by
enabling higher memory access speeds for a given memory capacity, or by allowing higher memory capacities at a
given memory speed. IBM has published TPC-E benchmark results confirming this dramatic performance improvement
with LRDIMM using Inphi’s iMB02-GS02A Isolation Memory Buffer. The published results show the cost effectiveness
of LRDIMM as a commercially available DRAM solution, one which will become even more cost effective over time. The
TPC-E benchmark models real world brokerage house functions with large customer databases, showing the promise of
LRDIMM in powering up online transaction processing and all time-critical, memory-intensive processing tasks.
Sources
TPC Benchmark E Full Disclosure Report for IBM® System x® 3650 M4 using Microsoft® SQL Server 2012
Enterprise Edition and Microsoft Windows® Server 2008 R2 Enterprise Edition SP1, March 6, 2012, published online at
http://www.tpc.org/tpce/results/tpce_result_detail.aspid=112030601
TPC Benchmark E Full Disclosure Report for IBM® System x® 3690 X5 using Microsoft® SQL Server 2008 R2
Enterprise Edition and Microsoft Windows® Server 2008 R2 Enterprise Edition, May 27, 2011, published online at
http://www.tpc.org/tpce/results/tpce_result_detail.aspid=111052701
All TPC-E results are posted on the website of the Transaction Processing Performance Council at
http://www.tpc.org/tpce/results/tpce_results.asp
Overview of TPC-E, published online at http://www.tpc.org/tpce/default.asp
Key Benchmarks for Measuring Transaction Processing Performance, published online at
http://searchdatamanagement.techtarget.com/feature/Key-benchmarks-for-measuring-transaction-processing-performance
10/26/2012
Inphi Headquarters
3945 Freedom Circle
Suite 1100
Santa Clara, CA 95054
Phone: (408) 217-7300
Inphi Southern California
112 S. Lakeview Canyon
Rd. Suite 100
Westlake Village, CA 91362
Phone: (805) 719-2300
Web: www.inphi.com
© 2012 Inphi Corporation. All rights reserved. Inphi, the Inphi logo, Think fast, and ExacTik are registered
trademarks of Inphi Corporation. iMB is a trademark of Inphi Corporation.
5