HT1625 - Topwaydisplay.com
HT1625 - Topwaydisplay.com
HT1625 - Topwaydisplay.com
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<strong>HT1625</strong><br />
Functional Description<br />
Display memory RAM structure<br />
The static display RAM is organized into 1284 bits and<br />
stores the display data. The contents of the RAM are directly<br />
mapped to the contents of the LCD driver. Data in<br />
the RAM can be accessed by the READ, WRITE and<br />
READ-MODIFY-WRITE <strong>com</strong>mands. The following is a<br />
mapping from the RAM to the LCD patterns.<br />
Time base and Watchdog Timer WDT<br />
The time base generator and WDT share the same divided<br />
(/256) counter. TIMER DIS/EN/CLR<br />
, WDT DIS/EN/CLR and IRQ EN/DIS are independent<br />
from each other. Once the WDT time-out occurs, the<br />
IRQ pin will remain at logic low level until the CLR WDT<br />
or the IRQ DIS <strong>com</strong>mand is issued.<br />
If an external clock is selected as the source of system<br />
frequency, the SYS DIS <strong>com</strong>mand turns out invalid and<br />
the power down mode fails to be carried out until the external<br />
clock source is removed.<br />
Buzzer tone output<br />
A simple tone generator is implemented in the <strong>HT1625</strong>.<br />
The tone generator can output a pair of differential driving<br />
signals on the BZ and BZ which are used to generate<br />
a single tone.<br />
Command format<br />
The <strong>HT1625</strong> can be configured by the software setting.<br />
There are two mode <strong>com</strong>mands to configure the<br />
<strong>HT1625</strong> resource and to transfer the LCD display data.<br />
+ %<br />
+ $<br />
+ #<br />
+ "<br />
+ !<br />
+ <br />
+ <br />
+ <br />
5 - / <br />
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5 - / <br />
!<br />
5 - /<br />
#<br />
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5 - / !<br />
%<br />
$<br />
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) $ ) # ) <br />
5 - / $ !<br />
%<br />
$<br />
, ! , , , <br />
, = J=<br />
) @ @ H<br />
, = J= " * EJI<br />
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RAM mapping<br />
, = J=<br />
) @ @ H<br />
+ 5 K H A<br />
6 E A * = I A<br />
# $<br />
8 , ,<br />
6 1 - 4 - , 15<br />
9 , 6 - , 15<br />
14 3<br />
+ 4 6 E A H<br />
9 , 6<br />
"<br />
,<br />
+ <br />
4<br />
3<br />
14 3 - , 15<br />
+ 4 9 , 6<br />
Timer and WDT configurations<br />
Rev. 1.10 8 September 11, 2002