By Whitney Zack and Wade Campney

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HMC – In Development

• Intel/Micron originally researched

• Micron/Samsung/IBM created consortium

• Uses TSV (Through Silicon Via) to stack

memory vertically.

• Low power consumption

• Small Size

• Specs to be released in 2012

RIT Computer Engineering Cluster SSH Clients

EECC 756 - Spring 2001 Homework Assignment #2, Due May 10

Evolution of the NVIDIA GPU Architecture

DRAM(Dynamic Ram) drawbacks • 1 transistor and 1 capacitor • Low cost per bit • Higher memory density of SRAM • High Power consumption because of refresh circuit • Heat problems

HMC – In Development • Intel/Micron originally researched • Micron/Samsung/IBM created consortium • Uses TSV (Through Silicon Via) to stack memory vertically. • Low power consumption • Small Size • Specs to be released in 2012

Page 1 and 2: By Whitney Zack and Wade Campney
Page 3 and 4: RAM
Page 5 and 6: Non‐Volatile • Is computer memo
Page 7 and 8: MRAM Drawbacks • Requires a lot o
Page 9 and 10: MRAM: Toggle Mode(PIC)
Page 11 and 12: MRAM Spin Transfer(PIC)
Page 13: SRAM(Static RAM) drawbacks • 4‐
Page 17 and 18: Design
Page 19 and 20: DRAM 512 MB Memory Stick
Page 21 and 22: 1 TB/s HMC DRAM Prototype
Page 23 and 24: Power Performance
Page 25: Questions, Comments, etc… • Tha

By Whitney Zack and Wade Campney

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