68HC11 Timing System

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The Input Captures are controlled by the edge bits in TCTL2 ($1021) in the following way: TCTL2 at $1021 0 0 EDG1B EDG1A EDG2B EDG2A EDG3B EDG3A EDGxB EDGxA Configuration 0 0 Capture disabled 0 1 Capture on rising edges only 1 0 Capture on falling edge only 1 1 Capture on any edge (rising or falling) ELET 3144 R. Alba-Flores 18
Example 3. The time of a falling edge on pin PA1 must be detected. How must TCTL2 be set up to do this? Sol. PA1 is connected to TIC2 (Input Capture Register 2). The previous table shows that the edge bits must be 1 and 0, respectively, to capture a falling edge, thus the code: LDAA #$08 STAA $1021 will set up TCTL2 to capture the time of a falling edge on PA1. ELET 3144 R. Alba-Flores 19
Page 1 and 2: 68HC11 Timing System ELET 3144 R. A
Page 3 and 4: Time Measuring Methods There are di
Page 5 and 6: The Free-Running Counter • The ou
Page 7 and 8: The Prescalar • Resolution is the
Page 9 and 10: Timer Overflow Every time the TCNT
Page 11 and 12: Example 1 • The TCNT register can
Page 13 and 14: ; * Subroutine to clear TOF SUB2: L
Page 15 and 16: Input Capture Registers Input captu
Page 17: The three 16-bit TIC registers (TIC
Page 21 and 22: The corresponding interrupt bit is
Page 23 and 24: ; *** This is a program to determin

68HC11 Timing System

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