68HC11 Timing System
68HC11 Timing System
68HC11 Timing System
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Input Flags and Interrupts.<br />
Bits 0, 1 and 2 of the TFLG1 register, at $1023, are used to signal<br />
an input capture on registers 3, 2,and 1, respectively, as shown in<br />
the following figure,<br />
TMSK1 at $1022<br />
OC1I OC2I OC3I OC4I OC5I IC1I IC2I IC3I<br />
TFLG1 at $1023<br />
OC1F OC2F OC3F OC4F OC5F IC1F IC2F IC3F<br />
If a capture is made, the flag will set. The flag can be cleared by<br />
writing a "1" into its bit position.<br />
ELET 3144 R. Alba-Flores 20
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