DE2-115: User Manual

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The voltage level of the I/O pins on the expansion headers can be adjusted to 3.3V, 2.5V, 1.8V, or 1.5V using JP6 (The default value is 3.3V, see Figure 4-17). Because the expansion I/Os are connected to Bank 4 of the FPGA and the VCCIO voltage (VCCIO4) of this bank is controlled by the header JP6, users can use a jumper to select the input voltage of VCCIO4 to 3.3V, 2.5V, 1.8V, and 1.5V to control the voltage level of the I/O pins. Table 4-11 lists the jumper settings of the JP6. The pin-outs of the JP6 appear in Figure 4-17. Figure 4-17 GPIO VCCIO supply voltage setting header Table 4-11 Voltage Level Setting of the Expansion Headers Using JP6 JP6 Jumper Settings Supplied Voltage to VCCIO4 IO Voltage of Expansion Headers (JP5) Short Pins 1 and 2 1.5V 1.5V Short Pins 3 and 4 1.8V 1.8V Short Pins 5 and 6 2.5V 2.5V Short Pins 7 and 8 3.3V 3.3V (Default) 47
Note : Users who want to use daughter card on GPIO connector need to pay close attention to the I/O standard between DE2-115 GPIO connector pins and daughter card system. For example, if the I/O standard of GPIO pins on DE2-115 board is set to 1.8V, a daughter card with 3.3V I/O standard may not work properly on the DE2-115 board due to I/O standard mismatch. Figure 4-18 depicts the pin definition on the expansion connector for using these I/Os as LVDS transmitters. Due to the reason that the column I/Os of the FPGA the expansion pins connecting with can only support emulated LVDS transmitters, two single-ended output buffers and external resistors must be used as shown in Figure 4-19. The associated I/O standard of these differential FPGA I/O pins on Quartus II project should set to LVDS_E_3R. Figure 4-18 Pin defined when using LVDS interface on GPIO FPGA pins The factory default setting on Rs resistor will be 47 ohm and Rp resistor will not be assembled for single-ended I/O standard application. For LVDS transmitter application, please assemble 120 and 170 ohm resistor on Rs and Rp position, respectively. Finally, Table 4-12 shows all the pin assignments of the GPIO connector. 48
Page 2 and 3: CONTENTS Chapter 1 DE2-115 Package
Page 4 and 5: 6.9 IR Receiver Demonstration .....
Page 6 and 7: Bag of six rubber (silicon) covers
Page 8 and 9: Chapter 2 Introduction of the Alter
Page 10 and 11: One 40-pin Expansion Header with di
Page 12 and 13: 40-pin expansion port o Configurabl
Page 14 and 15: You can also connect a microphone t
Page 16 and 17: 5. The DE2_115_ControlPanel.sof bit
Page 18 and 19: Figure 3-3 Controlling LEDs Choosin
Page 20 and 21: Figure 3-6 Monitoring switches and
Page 22 and 23: The Sequential Read function is use
Page 24 and 25: 3.7 SD Card The function is designe
Page 26 and 27: 1. Choosing the VGA tab leads to th
Page 28 and 29: Figure 3-14 Testing the IR receiver
Page 30 and 31: Chapter 4 Using the DE2-115 Board T
Page 32 and 33: • Configuring the FPGA in JTAG Mo
Page 34 and 35: Figure 4-6 Connections between the
Page 36 and 37: Table 4-1 Pin Assignments for Slide
Page 38 and 39: HEX0[5] PIN_J22 Seven Segment Digit
Page 40 and 41: 4.6 Using the LCD Module The LCD mo
Page 42 and 43: Figure 4-13 HSMC VCCIO supply volta
Page 44 and 45: HSMC_RX_D_N[1] PIN_C27 HSMC_RX_D_N[
Page 46 and 47: HSMC_TX_D_N[14] PIN_U28 HSMC_TX_D_N
Page 50 and 51: Figure 4-19 Using Emulated LVDS on
Page 52 and 53: 4.10 Using VGA The DE2-115 board in
Page 54 and 55: Table 4-16 Pin Assignments for ADV7
Page 56 and 57: Figure 4-24 Connections between FPG
Page 58 and 59: You will need to perform a hardware
Page 60 and 61: ENET1_TX_CLK PIN_C22 MII transmit c
Page 62 and 63: 4.17 Using the USB Interface The DE
Page 64 and 65: Table 4-26 IR Pin Assignments Signa
Page 66 and 67: • EEPROM The board has 32Kb EEPRO
Page 68 and 69: SRAM_DQ[7] PIN_AF7 SRAM Data[7] 3.3
Page 70 and 71: FL_ADDR[15] PIN_Y10 FLASH Address[1
Page 72 and 73: The top-level design file contains
Page 74 and 75: • System Configuration Under Syst
Page 76 and 77: Figure 5-6 HSMC Expansion Group The
Page 78 and 79: Chapter 6 Examples of Advanced Demo
Page 80 and 81: Finally, the YcrCb_to_RGB block con
Page 82 and 83: mouse connected to DE2-115 board. W
Page 84 and 85: sends a different USB packet to the
Page 86 and 87: Figure 6-7 Block diagram of the Kar
Page 88 and 89: Figure 6-9 Block Diagram of the SD
Page 90 and 91: Figure 6-11 Insert SD Card for the
Page 92 and 93: Main WAVE Lib System Call SEG7 I2C
Page 94 and 95: Figure 6-15 The setup for the SD mu
Page 96 and 97: Figure 6-16 Waveforms on two lines
Page 98 and 99:
Figure 6-18 Remote controller Table
Page 100 and 101:
We can apply the IR receiver to man
Page 102 and 103:
Figure 6-23 Block diagram of the Mu
Page 104 and 105:
Figure 6-24 The Setup of the Music
Page 106 and 107:
• Demonstration Setup, File Locat
Page 108 and 109:
Figure 6-27 MII interface MAC Confi
Page 110 and 111:
Figure 6-29 MAC Options Configurati
Page 112 and 113:
Figure 6-32 PHY connected to the MA
Page 114 and 115:
Ethernet 1 respectively. Table 6-9
Page 116:
Chapter 7 Appendix 7.1 Revision His
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DE2-115: User Manual

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