STM32 Journal - Digikey
STM32 Journal - Digikey
STM32 Journal - Digikey
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<strong>STM32</strong> <strong>Journal</strong><br />
connectivity, the <strong>STM32</strong> F1,<br />
<strong>STM32</strong> F2, and <strong>STM32</strong> F4<br />
offer an increasing range of<br />
capabilities.<br />
The <strong>STM32</strong> F0 is based on the<br />
ARM Cortex-M0 core. While<br />
other manufacturers also offer<br />
MCUs based on this core,<br />
ST has integrated its “<strong>STM32</strong><br />
DNA” into the <strong>STM32</strong> F0 to<br />
create an MCU that provides<br />
efficient data processing with<br />
the key peripherals MCUbased<br />
applications require.<br />
The <strong>STM32</strong> F0 also offers DMA<br />
capabilities to accelerate data<br />
processing and enable the<br />
lowest power operation even<br />
when sampling the ADC at<br />
a high data rate. With MCUs<br />
that have a lower level of<br />
integration, developers have to<br />
make compromises, such as<br />
settling for an 8-bit ADC rather<br />
than having access to the 12-<br />
bit ADC of the <strong>STM32</strong> F0.<br />
For complex medical systems<br />
that involve extensive<br />
computations, power<br />
consumption can be reduced<br />
by introducing the <strong>STM32</strong> F0<br />
as a second processor. When<br />
a system is in a low power<br />
mode, for example, it must still<br />
manage the UI and incoming<br />
data over its interfaces. Using<br />
<strong>STM32</strong> L15x<br />
System<br />
Power supply<br />
Internal regulator<br />
POR/PDR/PVD/BOR<br />
Xtal oscillators<br />
32 kHz + 1 ~24 MHz<br />
Internal RC oscillators<br />
37 kHz + 16 MHz<br />
Internal multispeed<br />
ULP RC oscillator<br />
64 kHz to 4 MHz<br />
PLL<br />
Clock control<br />
RTC/AWU<br />
2x watchdogs<br />
(independent and window)<br />
37/51/83/109/115 I/Os<br />
Cyclic redundancy<br />
check (CRC)<br />
Voltage scaling 3 modes<br />
Control<br />
6 to 8x 16-bit timer<br />
1x 32-bit timer<br />
Abbreviations:<br />
AWU: Auto wakeup from halt<br />
BOR: Brown out reset<br />
I 2 C: Inter integrated circuit<br />
ARM Cortex-M3 CPU<br />
32 MHz<br />
Nested vector<br />
interrupt<br />
controller (NVIC)<br />
JTAG/SW debug<br />
Embedded Trace<br />
Macrocell (ETM)<br />
Memory protection<br />
unit (MPU)<br />
AHB bus matrix<br />
Up to 12-channel DMA<br />
Touch sensing<br />
Analog I/O groups<br />
Up to 39 touchkeys<br />
Display<br />
LCD driver<br />
(8x40 / 4x44)<br />
Encryption<br />
AES (128 bits)*<br />
PDR: Power down reset<br />
POR: Power on reset<br />
PVD: Programmable voltage detector<br />
32- to 384-Kbyte<br />
Flash memory, dual bank, RWW<br />
10- to 48-Kbyte SRAM<br />
Up to 128-byte backup data<br />
4- to 12-byte EEPROM<br />
Boot ROM<br />
Connectivity<br />
FSMC<br />
USB 2.0 FS<br />
3 to 5x USART<br />
2 to 3x SPI<br />
2x I 2 C<br />
SDIO<br />
Analog<br />
2x 12-bit DAC<br />
12-bit ADC<br />
Up to 40 channels<br />
2x comparators<br />
3x op-amps<br />
Temperature sensor<br />
Note: * <strong>STM32</strong>L16x only<br />
RTC: Real time clock<br />
SPI: Serial peripheral interface<br />
USART: Universal sync/async receiver transmitter<br />
Figure 2 The <strong>STM32</strong> L1 family is built on ST’s 130 nm ultra-low leakage process technology that minimizes node capacitance<br />
for ultra-low-power operation and efficiency.<br />
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