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STM32 Journal - Digikey

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<strong>STM32</strong> <strong>Journal</strong><br />

Bringing 32-bit Performance<br />

to 8- and 16-bit Applications<br />

By Reinhard Keil, Director of MCU Tools, ARM Germany GmbH<br />

Shawn Prestridge, Senior Field Applications Engineer, IAR Systems<br />

Sean Newton, Field Applications Engineering Manager, STMicroelectronics<br />

Today’s embedded applications<br />

are being called upon to<br />

provide an increasing number<br />

of capabilities. More and more<br />

devices need to be connected,<br />

require greater precision, must<br />

offer a graphics-based interface<br />

with touch capabilities, utilize<br />

sophisticated signal processing,<br />

and support multimedia playback.<br />

In the past, developers were<br />

compelled by cost constraints<br />

to base their designs on 8- and<br />

16-bit architectures that limited<br />

performance. Now, with the<br />

availability of next-generation<br />

MCUs like the <strong>STM32</strong> F0 that<br />

provide 32-bit performance<br />

at 8-bit budget pricing, OEMs<br />

can bring substantial value to<br />

end-users without having to<br />

compromise functionality. In<br />

addition, powerful development<br />

tools like Keil’s MDK-ARM and<br />

IAR Embedded Workbench<br />

enable developers new to 32-<br />

bit programming to immediately<br />

exploit the full capabilities of the<br />

<strong>STM32</strong> F0 architecture.<br />

The 32-bit Advantage<br />

There are several ways in which<br />

the <strong>STM32</strong> F0 lowers product<br />

cost compared to 8- and 16-bitbased<br />

designs. Specifically,<br />

because these MCUs tend to be<br />

based on legacy architectures,<br />

they have many limitations that<br />

slow development by forcing<br />

designers to work around the<br />

architecture, so to speak. For<br />

example, to complete a 16 x 16<br />

multiplication for a processing<br />

algorithm, a 16-bit CPU requires<br />

four multiplies and several<br />

additions, depending upon the<br />

implementation. An 8-bit CPU<br />

would require significantly more<br />

cycles. With the <strong>STM32</strong> F0, this<br />

takes a single instruction.<br />

The result is code that makes<br />

better utilization of MCU<br />

resources, leading to faster<br />

operation, more performance per<br />

MHz, higher code density, and<br />

greater power efficiency. Since<br />

each instruction does more per<br />

clock cycle, applications can be<br />

written using less code. In addition<br />

to accelerating development,<br />

shorter code is easier to debug as<br />

well. Together, all of these benefits<br />

lead to lower system cost.<br />

Cost, however, is only one of<br />

the numerous advantages the<br />

<strong>STM32</strong> F0 has over 8- and 16-<br />

bit architectures. The <strong>STM32</strong><br />

F0 is a full embedded MCU<br />

built using the same <strong>STM32</strong><br />

DNA that the rest of the <strong>STM32</strong><br />

family has, including excellent<br />

real-time performance, DMA,<br />

high-resolution ADC and DAC<br />

peripherals, motor control<br />

timers, and connectivity<br />

interfaces. These integrated<br />

capabilities bring tremendous<br />

efficiency to cost-sensitive<br />

designs in a way that limited<br />

8- and 16-bit MCU architectures<br />

cannot (see Figure 1).<br />

For example, the availability of<br />

a 32-bit bus not only speeds<br />

data transfers and increases<br />

computing performance, it<br />

improves system reliability.<br />

Consider the challenge of reading<br />

a 12-bit DAC using an 8-bit bus<br />

where the CPU has to read the<br />

DAC twice to capture the entire<br />

sample. If an interrupt occurs<br />

between these reads, the DAC<br />

data may be overwritten by the<br />

next sample before the interrupt<br />

is completed and the second<br />

read can be executed. To prevent<br />

this, developers have to manually<br />

disable interrupts for every<br />

such “atomic” operation in an<br />

application. If even one instance<br />

is missed, this creates a potential<br />

for an intermittent error that will<br />

be extremely difficult to resolve.<br />

DMA: Moving Data<br />

Efficiently<br />

The <strong>STM32</strong> F0 is a modern<br />

architecture integrating the<br />

3

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