Embedded Linux Power Management on the Intel Atom ... - MontaVista

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C states C0 HFM C0 LFM C1/C2 C4 C6 Core voltage Core clock OFF OFF OFF PLL OFF OFF L1 caches flushed flushed off L2 caches Partial flush off Wakeup time <strong>Power</strong> active active Intel <strong>Embedded</strong> and Communications Group
What is Deep <strong>Power</strong> Down Technology? • Deep <strong>Power</strong> Down Technology (C6) is a new low power state designed to reduce power consumption due to leakage current. • On software’s request, the processor saves its state in a power-preserved domain (SRAM) and shuts down the power to the chip (core and caches) • In this mode, – All caches are flushed. – The core is not functional and the state is not retained. – No snoops or MSIs from chipset are permitted while in C6. • On exiting this state, power and clocks are restored, CPU is reset, state is restored, and execution resumes seamlessly. Benefits: • Much greater leakage savings than in C4. • Exit latencies well within today’s C-state exit latencies. • No software intervention needed for context save/restore. Intel <strong>Embedded</strong> and Communications Group
Page 1 and 2: Embedded L
Page 3 and 4: Why care about Power</stron
Page 5 and 6: Power is a large f
Page 7 and 8: How we save power Two big ways: •
Page 9 and 10: ACPI / cpufreq Software Architectur
Page 11: ACPI • ACPI is an open-industry s
Page 15 and 16: L2 Dynamic Cache Sizing OS ACPI 8-W
Page 17 and 18: Enumerate System Devices You'll nee
Page 19 and 20: Identify Constraints Are there rela
Page 22 and 23: Define Power <stro
Page 24 and 25: Stitching it together • CPUfreq
Page 26 and 27: The Governor • Task: Decide how a
Page 28 and 29: ondemand Governor Example
Page 30 and 31: Making Drivers Power</stron
Page 32 and 33: cpufreq Notifications • Your driv
Page 34 and 35: Saving power during idle • Idle S
Page 36 and 37: Mitigate wakeups with Power
Page 38 and 39: Free for the asking... “MontaVist

Embedded Linux Power Management on the Intel Atom ... - MontaVista

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