Verilog 2 - Brown University

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Verilog 2 - Brown University

Verilog 2 - Brown University

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Difference between HLL and <strong>Verilog</strong> assign<br />

can only work with tri-state drivers<br />

[Example from Thornton & Reese]<br />

S. Reda EN164 Sp ‘11 6

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M I P S Reference Data

Difference between HLL and <strong>Verilog</strong> assign can only work with tri-state drivers [Example from Thornton & Reese] S. Reda EN164 Sp ‘11 6

Example of a dataflow 4-bit adder [Example from Thornton & Reese] S. Reda EN164 Sp ‘11 7

Page 1 and 2: EN164: Design of Computing Systems
Page 3 and 4: Operator types in dataflow expressi
Page 5: Difference between HLL and Verilog
Page 9 and 10: Data types • A reg is a Verilog v
Page 11 and 12: initial statements • An initial
Page 13 and 14: Sensitivity list of events • An e
Page 15 and 16: always statements • Because of t
Page 17 and 18: Example: Mux4x1 module mux4x1(out,
Page 19 and 20: Edge-triggered storage element (D-F