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<strong>VLSI</strong>/<strong>CAD</strong> 2009 Fall: <strong>VLSI</strong>/<strong>CAD</strong> <strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University1


(Chip)<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University2


¦§ ¦§¥ ¥ ¥¢ ¢ ¢ ¢¡¡¡¡©¥¥©¥©¥©¤¤¤¤ ¤¤¤ ¤¨¨¦§ ¦§¥¤ £¤¤¤¤ ¨¤¤¤£ £ £¡¡¡ ¨¡¡¡¡¡ System/IC Development FlowApplicationsSpecificationsSystem DesignComponent Design100 m2 W176 x 220 pixel655351.8 TFTHardware:CPU,RAM, I/O…Software:C,C++always @(posedge clk)beginif (sel1) beginout=in1;elseout=in2;endendSynthesisTestingFabricationPlacement &RoutingLayoutMarketing<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University5


IEK ITIS 2007 IC 14,574 2006 4.6%– 3,997 2006 23.6%<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUP– 7,274 2006 5.1%– 2,280 2006 8.2%– 1,023 2006 10.7% IEK ITIS (2008/2)National Cheng Kung University6


(e) (estimate) TSIA IEK(2009/08)<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University7


<strong>VLSI</strong>/<strong>CAD</strong> IC (System on a chip,SoC) (SiliconIntellectual Property) – – A/DD/A <strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University10


<strong>VLSI</strong>/<strong>CAD</strong> (1) Design techniques: Digital ↔ Analog– SoC design– <strong>VLSI</strong> architecture for signal processing– Application-specific integrated circuits (ASICs)– Analog/Mixed-signal circuit design– RF circuit design– Electronic design automation (EDA)– <strong>VLSI</strong> & SoC testing<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University11


<strong>VLSI</strong>/<strong>CAD</strong> (2) General Techniques:– Design methodology, <strong>CAD</strong>, Testing– Design for low-power, high-speed, area-efficient,or reconfigurability Targeted Applications:– Multimedia applications– Communication applications– Power management applications– Bio-electronic applications– More …...<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University12


<strong>VLSI</strong>/<strong>CAD</strong> - (NSC)– – (MOEA)– – – <strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University13


<strong>VLSI</strong>/<strong>CAD</strong> - (NSC)– – (MOE)– – (SOC) (MOEA)– <strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University14


IC IC IC IC IC <strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University15


<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University16


<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University17


Delta-Sigma <strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University18


IC <strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University19


<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University20


<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University21


<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University24


<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University25


<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University26


<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University27


(SOC) (ASSP) <strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University28


<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University29


<strong>VLSI</strong>/<strong>CAD</strong> GroupQ & A<strong>VLSI</strong> Design LABEE <strong>VLSI</strong> GROUPNational Cheng Kung University30

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