Qoriq LS-2 Family Fact Sheet (pdf) - Freescale Semiconductor
Qoriq LS-2 Family Fact Sheet (pdf) - Freescale Semiconductor
Qoriq LS-2 Family Fact Sheet (pdf) - Freescale Semiconductor
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Target Applications<br />
The QorIQ <strong>LS</strong>-2 family features dual highperformance<br />
ARM Cortex-A15 cores<br />
together with an optimized blend of<br />
advanced I/O capabilities. This combination<br />
delivers industry-leading security and IP<br />
forwarding with an advanced integration<br />
level that enables customers to reduce<br />
BOM costs and accelerate time to market<br />
for next-generation networking applications,<br />
including:<br />
• Multiservice routers<br />
• Residential gateways<br />
• Security appliances<br />
• WLAN enterprise access points (EAPs)<br />
• Industrial communications<br />
• Robotics<br />
QorIQ Communications Processors Built on Layerscape Architecture<br />
QorIQ <strong>LS</strong>-2 <strong>Family</strong><br />
Overview<br />
The QorIQ <strong>LS</strong>-2 family is built on our next-generation platform based on<br />
Layerscape architecture, the industry’s first software-aware, core-agnostic<br />
networking architecture to deliver unprecedented efficiency and scalability.<br />
At less than 5W total power, the <strong>LS</strong>-2 family delivers CoreMark ® performance<br />
of over 10,000 in a low-cost package for fan-less applications. Key highlights of<br />
the family include the new Layerscape architecture, dual ARM ® Cortex-A15<br />
cores, virtualization support, advanced security features and upgraded high-speed<br />
interconnects.<br />
QorIQ <strong>LS</strong>-2 <strong>Family</strong> Block Diagram<br />
QorIQ <strong>LS</strong>-2 <strong>Family</strong> Block Diagram<br />
System Control<br />
Internal Boot ROM<br />
Security Monitor<br />
Power Management<br />
DMA<br />
System Interfaces<br />
NAND Flash Control<br />
1x USB 3.0 w/PHY<br />
1x USB 2.0 w/PHY<br />
Advanced Audio<br />
4x FlexCAN<br />
6x UART<br />
3x I2C, 2x SPI<br />
2x TDM<br />
2x SDMMC<br />
QSPI, 2x SATA 3.0,<br />
LCDC<br />
32 KB<br />
D-Cache<br />
General-Purpose Processing Layer (GPPL)<br />
ARM ® Cortex-A15 Core<br />
1024 KB Coherent L2 Cache<br />
Accelerated Packet Processing Layer (APPL)<br />
Express Packet I/O Layer (EPIL)<br />
1G<br />
32 KB<br />
I-Cache<br />
Coherent Interconnect<br />
8-Lane SerDes<br />
8/16/32/64-bit<br />
DDR3/3L/4<br />
Memory Controller<br />
PCI Express ® 2.0
Layerscape Architecture<br />
An evolution of our Data Path Acceleration<br />
Architecture, Layerscape is a modular,<br />
programmable system architecture that<br />
maximizes performance and power efficiency<br />
for all classes of applications across all nodes<br />
of the network. Layerscape architecture<br />
offers accelerated packet processing through<br />
independent processing of data and control<br />
functions. It is comprised of three layers which<br />
are independently selectable and scalable to<br />
meet various networking product demands,<br />
reducing interference of heterogeneous traffic<br />
between layers and achieving unprecedented<br />
performance/power efficiency.<br />
With a consistent platform architecture,<br />
Layerscape features a comprehensive<br />
enablement model focused on ease of<br />
programmability. The high-level languagebased<br />
programming model with standard<br />
tools and constructs delivers a solution with<br />
extreme programming flexibility and scale to<br />
enable the ultimate real-time, “soft” control<br />
over the network. This results in faster time<br />
to market, lower cost of development and<br />
protection of software investment costs over<br />
multiple generations.<br />
Core Complex<br />
The QorIQ <strong>LS</strong>-2 family integrates dual ARM<br />
Cortex-A15 cores and shares virtualization<br />
support as well as software and pin<br />
compatibility with <strong>LS</strong>-1 family devices which<br />
integrate dual ARM Cortex-A7 cores. The<br />
dual ARM Cortex-A15 processor cores in<br />
<strong>LS</strong>-2 products each feature 32 KB of L1<br />
instruction and data cache, and share up to<br />
1 MB of coherent L2 cache. The DDR<br />
memory controller supports type 3, 3L and 4<br />
memory devices at up to 1333 MHz.<br />
System Interfaces and<br />
Networking<br />
An eight-lane SerDes provides support for<br />
multi-protocol high-speed interfaces, including<br />
up to five Gigabit Ethernet ports with IEEE ®<br />
1588 support, DMA controlled PCI Express ®<br />
generation 2.0 ports and dual SATA 3.0 ports.<br />
Also featured are USB 3.0 and 2.0 controllers<br />
QorIQ <strong>LS</strong>-2 <strong>Family</strong> Features<br />
General-Purpose<br />
Processing Layer<br />
with integrated PHYs. Additional interfaces<br />
include multiple CAN ports for industrial<br />
applications, six UARTs, triple I2C and dual<br />
SPI ports.<br />
Scalability<br />
A key advantage of QorIQ processors built<br />
on Layerscape architecture is the complete<br />
compatibility of features such as virtualization<br />
and cache coherency, as well as ISA between<br />
the <strong>LS</strong>-1 and <strong>LS</strong>-2 families. This, together<br />
with pin-compatibility between <strong>LS</strong>-1 and <strong>LS</strong>-2<br />
products, enables customers to simply and<br />
smoothly migrate applications between these<br />
next-generation QorIQ families.<br />
Software and Development Tools<br />
The Layerscape architecture software model<br />
supports the heterogeneous compute initiative<br />
to hide accelerator complexity by offering<br />
autonomous offload and enabling constructs<br />
for seamless task migration as well as efficient<br />
communication between layers. By providing<br />
industry standard Linux ® development<br />
tools and a full-featured Linux environment,<br />
<strong>Freescale</strong> provides a rich development<br />
environment and enables solutions to be<br />
quickly brought to market. In addition,<br />
• Dual ARM ® Cortex-A15 cores with frequencies up to 1.5 GHz<br />
• 32 KB instruction and data L1 cache<br />
• Up to 1024 KB coherent L2 cache<br />
• Independently power gated to save power when both cores are not in use<br />
• DDR 3/3L/4 up to 1333 MHz<br />
• 8/16/32/64-bit data bus w/ECC<br />
• SEC<br />
• Additional features and capabilities vary by device<br />
Accelerated Packet<br />
Processing Layer<br />
Express Packet I/O Layer • Up to 5x Gigabit Ethernet<br />
• IEEE ® 1588, EEE<br />
• 8-lane SerDes<br />
• MII, RGMII, SGMII and QSGMII<br />
• 3x PCI Express ® Gen2<br />
System Control • Internal boot ROM<br />
• Secure boot and <strong>Freescale</strong> trust architecture<br />
• Security monitor<br />
• Advanced power management<br />
• DMA<br />
System Interfaces • NAND flash control<br />
• 2x SATA 3 (8-lane SerDes shared with PCI Express)<br />
• 2x SGMII and QSGMII<br />
• 2x USB2 and 1x USB3 with integrated PHYs<br />
• µQE-ULite (UART, HDLC and TDM)<br />
• Advanced audio: 3x SAI, SPDIF, ASRC, PWM<br />
• 6x UARTs, 3x I2C, 2x SPI, 2x TDM, 2x µSDHC, Quad SPI and misc.<br />
the CodeWarrior Development Studio<br />
integrated development environment provides<br />
a highly visual and automated framework<br />
to accelerate the development of the most<br />
complex embedded applications, allowing<br />
developers to quickly start leveraging the lowpower,<br />
high-performance architecture.<br />
For customer evaluation, the QorIQ <strong>LS</strong>-2<br />
family offers two low-cost reference design<br />
kits, including the modular <strong>Freescale</strong> Tower<br />
System. Evaluation kits include a Linux<br />
3.x BSP with optimized drivers to support<br />
peripherals, a quick start guide and a sixmonth<br />
evaluation license for CodeWarrior<br />
development tools.<br />
Ecosystem<br />
For more information, please visit freescale.com/QorIQ<br />
The QorIQ <strong>LS</strong>-2 family devices are supported<br />
by our extensive third-party ecosystem,<br />
the largest and most established in the<br />
communications market. In conjunction<br />
with our expertise and worldwide support<br />
infrastructure, the ecosystem will help<br />
customers accelerate their migration from<br />
both competitive solutions and from legacy<br />
<strong>Freescale</strong> devices, preserve investment costs<br />
and reduce time to market.<br />
<strong>Freescale</strong>, the <strong>Freescale</strong> logo, CodeWarrior and QorIQ are trademarks of <strong>Freescale</strong> <strong>Semiconductor</strong>, Inc., Reg. U.S. Pat. & Tm. Off.<br />
ARM is a registered trademark of ARM Limited. ARM Cortex-A7 and Cortex-A15 are trademarks of ARM Limited.<br />
All other product or service names are the property of their respective owners. ©2012 <strong>Freescale</strong> <strong>Semiconductor</strong>, Inc.<br />
Document Number: QORIQ<strong>LS</strong>2FAMILYFS REV 0