New Breed of Network Fault-Tolerant Voltage-Source ... - IEEE Xplore

This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.ADAM et al.: NEW BREED OF NETWORK FAULT-TOLERANT VOLTAGE-SOURCE-CONVERTER HVDC TRANSMISSION SYSTEM 7Fig. 3.Test network and waveforms demonstrating the steady-state operation of HVDC system based on hybrid voltage source multilevel converter with ac sidecascaded H-bridge cells. (a) Test network used to illustrate the viability of the hybrid multilevel voltage source converter HVDC systems; (b) active and reactivepower converter station 1 exchanges with PCC ; (c) active and reactive power converter station 2 exchanges with PCC ; (d) voltage magnitude at PCC ;(e) voltage waveforms at PCC ; (f) current waveforms converter station 1 exchanges with PCC ; (g) voltage across 21 cell capacitors of the three phases ofconverter 1; (h) voltage across the dc link of converter station 2.and converter 2 adjusts its reactive power exchange with gridin order support voltage at [see Fig. 4(d)]. The transientsshown of active and reactive powers at PCC2 are relatedto the reaction of the ac voltage controller that regulates the acvoltage at . Fig. 4(c) shows that the voltage magnitude atremains unaffected; confirming that the hybrid voltage

This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.ADAM et al.: NEW BREED OF NETWORK FAULT-TOLERANT VOLTAGE-SOURCE-CONVERTER HVDC TRANSMISSION SYSTEM 9Fig. 4. (Continued.) Waveforms demonstrating ac fault ride-through capability of HVDC transmission systems based on hybrid voltage multilevel converterwith ac side cascaded H-bridge cells. (k) Voltage magnitude at PCC1. (l) Voltage magnitude at PCC2. (m) Current waveforms converter 2 injects into PCC2.(n) Converter 2 dc link voltage. (o) Voltage across the 21 H-bridge cell capacitors of converter 2. Results in (i)–(o) demonstrate the case when the converterstations operate close to their maximum active power capabilities (power command at converter 1 is set to 0.75 pu, which is 515 MW) and system is subjected toa three-phase fault with a 300-ms duration.the transient power flow on the dc side, hence minimizing disturbanceon the dc link voltage. Fig. 4(g) shows that the H-bridgecell voltage stresses are controlled as the system rides throughthe ac-side fault. This confirms that the complexity of a HVDCsystem based on the hybrid multilevel VSC does not compromiseits ac fault ride-through capability. Fig. 4(h) shows the hybridmultilevel VSC presents high-quality voltage to the convertertransformer, with low harmonic content and . Thismay permit elimination of ac-side filters and the use of standardinsulation ac transmission transformers.The results in Fig. 4(i)–(o) are presented to demonstrate theability of the proposed HVDC system to operate in faulty networks,independent of its operating point and fault duration.This case demonstrates the superiority of current-limiting VSCsover a synchronous generator during ac network disturbances.(Converter 2 current injection into is always controlledand less than full load rated current despite the fault durationand the amount of power exchange between ac networksand .)C. DC Network FaultsThe inherent current-limiting capability of the hybrid multilevelVSC with ac-side cascaded H-bridge cells that permitsthe VSC-HVDC system to ride-through dc-side faults willbe demonstrated here. The test network is subjected to a 140ms solid pole-to-pole dc-side fault at the location indicatedin Fig. 3(a). During the dc-side fault period, active powerexchange between the two grids and is reduced tozero. This facilitates uninterruptable system recovery from thetemporary dc fault with minimal inrush current, since the powerpaths between the converter’s ac and dc sides are blocked(by inhibiting all converter gate signals) to eliminate a gridcontribution to the dc fault.Fig. 5 shows the results when the test network is subjected toa temporary solid pole-to-pole dc fault at the middle of the dclink. Fig. 5(a) and (b) shows the active and reactive powers thatconverter stations 1 and 2 exchange with and .Observe zero active and reactive power exchange between theconverter stations and ac grids and during the fault period,hence there is no current flow in the switches of converters1 and 2. However, a large surge in active and reactive poweris observed when the gating signals to converters 1 and 2 arerestored after the fault is cleared, in order to restart the system.Fig. 5(c) and (d) shows that the current surge experienced byboth converter stations causes noticeable voltage dipping atand due to increased consumption of reactivepower during system start-up and dc link voltage build-up followingfault clearance. The surge in active and reactive powersin both converter stations occurs as the dc side capacitors try to

This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.10 IEEE TRANSACTIONS ON POWER SYSTEMSFig. 5. Waveforms demonstrating dc fault ride-through capability of HVDC transmission systems based on hybrid voltage multilevel converter with ac side cascadedH-bridge cells. (a) Active and reactive power converter 1 exchanges with PCC . (b) Active and reactive power converter 2 exchanges with PCC . (c)Voltage magnitude at PCC . (d) Voltage magnitude at PCC . (e) Current waveforms converter 1 exchange with grid G at PCC . (f) Current waveforms converter2 exchange with grid G at PCC . (g) Converter 2 dc link voltage. (h) Zoomed version of dc link current demonstrating the benefits of dc fault reverseblocking capability.charge from both ac sides; this causes a large current flow fromboth ac sides to the dc side to charge the dc link capacitors andcable distributed capacitors as shown in Fig. 5(e) and 5(f). Theresults in Fig. 5(e) and 5(f) also demonstrate the benefits of dcfault reverse blocking capability inherent in this hybrid system,as the converter switches experience high current stresses onlyduring dc link voltage build-up. Fig. 5(g) shows that converter2 dc link voltage recovers to the pre-fault state after the fault

This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.ADAM et al.: NEW BREED OF NETWORK FAULT-TOLERANT VOLTAGE-SOURCE-CONVERTER HVDC TRANSMISSION SYSTEM 11Fig. 5. (Continued.) Waveforms demonstrating dc fault ride-through capability of HVDC transmission systems based on hybrid voltage multilevel converter withac side cascaded H-bridge cells. (i) Voltage across the H-bridge cell capacitors of converter 1. (j) Voltage across the H-bridge cell capacitors of converter 2.is cleared. Notice the recovery period for the dc link voltage isrelatively long; this is the major disadvantage of the proposedHVDC systems as it uses a common dc link capacitor. Fig. 5(h)expands the dc fault current and shows the 60-kA peak decaysto zero in less than four cycles (for 50 Hz) after discharge of dclink and cable distributed capacitors. This result confirms thepossibility of eliminating dc circuit breakers to isolate permanentdc side faults in dc networks that use HVDC converterswith current limiting capability. Fig. 5(h) also shows the acgrids start to contribute to the dc link current after the fault iscleared, to charge the dc side capacitors. Fig. 5(i) and (j) showsthe voltage across the 21 H-bridge cells of the converter stations1 and 2 (each group of traces represent voltages across 7H-bridge cell capacitors in each phase). The voltage across theH-bridge cell capacitors remains unaffected during the entirefault period as the converters are blocked. The cell capacitorsstart to contribute energy to the main dc link capacitors duringdc link voltage build-up after restoration of the converter gatingsignals. This contribution creates a noticeable reduction in thecell capacitor voltages during system restart. The cell capacitorsof converter 2 that regulate dc link voltage, experience a largervoltage dip than converter 1, which regulates active power.However, the reduction in H-bridge cell capacitor voltages isminimized if large capacitance is used.V. CONCLUSIONThis paper presented a new generation VSC-HVDC transmissionsystem based on a hybrid multilevel converter with ac-sidecascaded H-bridge cells. The main advantages of the proposedHVDC system are:• potential small footprint and lower semiconductor lossescompared to present HVDC systems.• low filtering requirements on the ac sides and presentshigh-quality voltage to the converter transformer.• does not compromise the advantages of VSC-HVDC systemssuch as four-quadrant operation; voltage support capability;and black-start capability, which is vital for connectionof weak ac networks with no generation and windfarms.• modular design and converter fault management (inclusionof redundant cells in each phase may allow the system tooperate normally during failure of a few H-bridge cells;whence a cell bypass mechanism is required).• resilient to ac side faults (symmetrical and asymmetrical).• inherent dc fault reverse blocking capability that allowsconverter stations to block the power paths between the acand dc sides during dc side faults (active power betweenac and dc sides, and reactive power exchange between aconverter station and ac networks), hence eliminating anygrid contribution to the dc fault current.REFERENCES[1] G. P. Adam et al., “Network fault tolerant voltage-source-convertersfor high-voltage applications,” in Proc. 9th IET Int. Conf. AC and DCPower Transmission, London, U.K., 2010, pp. 1–5.[2] Y. Zhang et al., “Voltage source converter in high voltage applications:Multilevel versus two-level converters,” in Proc. 9th IET Int. Conf. ACand DC Power Transmission, London, U.K., 2010, pp. 1–5.[3] G. P. Adam et al., “Modular multilevel inverter: Pulse width modulationand capacitor balancing technique,” IET Power Electron., vol. 3,pp. 702–715, 2010.[4] M. M. C. Merlin et al., “A new hybrid multi-level voltage-source converterwith DC fault blocking capability,” in Proc. 9th IET Int. Conf.AC and DC Power Transmission, London, U.K., 2010, pp. 1–5.[5] V. Naumanen et al., “Mitigation of high du=dt-originated motor overvoltagesin multilevel inverter drives,” IET Power Electron., vol. 3, pp.681–689, 2010.[6] H. Abu-Rub et al., “Medium-voltage multilevel converters: State ofthe art, challenges, and requirements in industrial applications,” IEEETrans. Ind. Electron., vol. 57, no. 8, pp. 2581–2596, Aug. 2010.[7] G. P. Adam et al., “Modular multilevel converter for medium-voltageapplications,” in Proc. IEEE Int. Conf. Electr. Mach. Drives Conf.,2011, pp. 1013–1018.[8] G. P. Adam, S. J. Finney, A. M. Massoud, and B. W. Williams, “Capacitorbalance issues of the diode-clamped multilevel inverter operated ina quasi-two-state mode,” IEEE Trans. Ind. Electron., vol. 55, no. 8, pp.3088–3099, Aug. 2008.[9] M. Chaves et al., “New approach in back-to-back m-leveldiodeclamped multilevel converter modelling and direct currentbus voltages balancing,” IET Power Electron., vol. 3, pp. 578–589,2010.[10] N. Flourentzou et al., “VSC-based HVDC power transmission systems:An overview,” IEEE Trans. Power Electron., vol. 24, no. 3, pp.592–602, Mar. 2009.[11] L. G. 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This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination.12 IEEE TRANSACTIONS ON POWER SYSTEMS[15] C. Du et al., “VSC-HVDC system for industrial plants with onsite generators,”IEEE Trans. Power Del., vol. 24, no. 3, pp. 1359–1366, Jul.2009.[16] D. Guanjun et al., “New technologies of voltage source converter(VSC) for HVDC transmission system based on VSC,” in Proc.IEEE Power Energy Soc. Gen. Meeting—Conversion and Delivery ofElectrical Energy in the 21st Century, 2008, pp. 1–8.[17] N. Flourentzou and V. G. Agelidis, “Optimized modulation for AC-DCharmonic immunity in VSC HVDC transmission,” IEEE Trans. PowerDel., vol. 25, no. 3, pp. 1713–1720, Jul. 2010.[18] D. Cuiqing et al., “Use of VSC-HVDC for industrial systems havingonsite generation with frequency control,” IEEE Trans. Power Del., vol.23, no. 4, pp. 2233–2240, Oct. 2008.[19] Z. Huang et al., “Exploiting voltage support of voltage-source HVDC,”Proc. Inst. Electr. Eng.—Gen., Transm. Distrib., vol. 150, pp. 252–256,2003.[20] G. Kalcon et al., “HVDC network: Wind power integration and creationof super grid,” in Proc. 10th Int. Conf. Environ. Electr. Eng., 2011, pp.1–4.[21] D. Hui et al., “Analysis of coupling effects on overhead VSC-HVDCtransmission lines from AC lines with shared right of way,” IEEE Trans.Power Del., vol. 25, pp. 2976–2986, 2010.[22] B. T. Ooi and X. Wang, “Boost-type PWM HVDC transmissionsystem,” IEEE Trans. Power Del., vol. 6, no. 4, pp. 1557–1563, Oct.1991.[23] G. P. Adam et al., “HVDC Network: DC fault ride-through improvement,”in Proc. Cigre Canada Conf. Power Syst., Halifax, NS, Canada,Sep. 6–8, 2011, pp. 1–8.[24] G. P. Adam et al., “Dynamic behaviour of five-level grid connectedmodular inverters,” in Proc. 9th Int. Conf. Environ. Electr. Eng., 2010,pp. 461–464.[25] M. Perez et al., “Predictive control of AC-AC modular multilevel converters,”IEEE Trans. Ind. Electron., vol. 59, no. 7, pp. 2832–2839, Jul.2012.[26] J. Háfner and B. Jacobson, “Proactive hybrid HVDC breakers—A keyinnovation for reliable HVDC grids,” in Proc. Cigre Conf., Bologna,Italy, Sep. 13-15, 2011, pp. 1–8.Khaled H. Ahmed (M’10) received the B.Sc. (firstclass honours) and M.Sc. degrees from the Facultyof Engineering, Alexandria University, Alexandria,Egypt, in 2002 and 2004, respectively, and the Ph.D.degree in electrical engineering from the Universityof Strathclyde, Glasgow, U.K., in 2008.Since 2009, he has been a Lecturer with AlexandriaUniversity, Alexandria, Egypt. He has authoredor coauthored more than 39 technical papers in refereedjournals and conferences. He is a reviewer forthe IEEE transactions and several conferences. Hisresearch interests are digital control of power electronic systems, power quality,micro-grids, distributed generation, dc–dc converters, and HVDC.Stephen J. Finney received the M.Eng. degree fromLoughborough University of Technology, Loughborough,U.K., in 1988, and the Ph.D. degree fromHeriot-Watt University, Edinburgh, U.K., in 1995.For two years, he was with the Electricity CouncilResearch Centre Laboratories, Chester, U.K. He iscurrently a Professor with the University of Strathclyde,Glasgow, U.K. His areas of research interestare soft-switching techniques, power semiconductorprotection, energy recovery snubber circuits, andlow-distortion rectifier topologies.Keith Bell received the B.Eng. (Hons) and Ph.D. inelectrical engineering from the University of Bath,Bath, U.K., in 1990 and 1995, respectively.He is a Reader with the Department of Electronicand Electrical Engineering, University of Strathclyde,Glasgow, U.K. Between 1998 and 2005,he was with National Grid, Warwick, U.K. Hisresearch interests include power system planningand operation, electricity markets, regulation, andgrid integration of renewables.Dr. Bell received the CIGRE Technical CommitteeAward in 2010 and is a Member of the IET and is a Chartered Engineer in theU.K. He is a member of CIGRE Study Committee C1 on System Developmentand Economics, the IET Power Academy Council and the IEEE CAMS TaskForce on Understanding, Mitigation and Prevention of Cascading Outages.Grain Philip Adam (M’12) received the Ph.D.degree in power electronics from the University ofStrathclyde, Glasgow, U.K., in 2007He is a Research Fellow with the Institute ofEnergy and Environment, University of Strathclyde,Glasgow, U.K. His research interests are fault-tolerantvoltage-source multilevel converters for HVDCsystems, control of HVDC transmission systems andmultiterminal HVDC networks, voltage-source-converter-basedFACTS devices, and grid integrationissues of renewable energies. He has authored andcoauthored several technical reports and journal and conference papers inthe area of multilevel converters and HVDC systems, and grid integration ofrenewable power. Also, he has contributed in reviewing process for severalIEEE and IET transactions, journals, and conferences.Barry W. Williams received the M.Eng.Sc. degreefrom the University of Adelaide, Adelaide, Australia,in 1978, and the Ph.D. degree from Cambridge University,Cambridge, U.K., in 1980.After seven years as a Lecturer with Imperial College,University of London, London, U.K., he was appointedto a Chair of Electrical Engineering at Heriot-Watt University, Edinburgh, U.K., in 1986. He is currentlya Professor with the University of Strathclyde,Glasgow, U.K. His teaching covers power electronics(in which he has a free internet text) and drive systems.His research activities include power semiconductor modeling and protection,converter topologies, soft switching techniques, and application of ASICsand microprocessors to industrial electronics.