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• 240 cores• 4-stage pipeline on each core• 960 threads in flight at any given time.• Memory allocated for a set of 8 Cores (SM)• 64K Registers• 16 KB Shared Memory• 8K Constant Cache• 8K Texture Cache
Thread Execution Control Unit1 2 M-1M1 23 45 67 8SpecialFunctionUnit1 23 45 67 8SpecialFunctionUnitProcessors, Control Units,Shared Memory andRegisters(on-chip area)Multi Processors1 23 45 67 8SpecialFunctionUnit1 23 45 67 8SpecialFunctionUnitSharedMemory +RegistersSharedMemory +RegistersSharedMemory +RegistersSharedMemory +RegistersDevice Memory (off-chip area)
Page 2 and 3: • Dedicated co-processorsthat han
Page 4 and 5: • Classic Irregular Algorithm•
Page 6: • Pointer Jumping Technique for t
Page 11 and 12: CPU / HostKernel 1GridBlocks(0,0)GP
Page 13: • Simple Problem (Sequentially Sp
Page 17 and 18: • A basic technique in parallel c
Page 19: • A basic technique in parallel c
Page 22 and 23: • Use pointer jumping repeatedly
Page 24 and 25: 100001000Time (Milliseconds)1001010
Page 26: • The original algorithm has n th
Page 29 and 30: 40961024256Time (Milliseconds)64164
Page 31 and 32: • Designed for SMPs - Sparse Ruli
Page 33 and 34: SuccessorArrayLocal Ranks2 4 8 1 9
Page 51 and 52: • Assume you select n/log n split
Page 55 and 56: • Each phase is coded as separate
Page 57 and 58:
• Notice that choosing splitters
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• Two factors that contribute to
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• Ordered Lists are Lists with su
Page 64 and 65:
• Parallel Processing of Graphs
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Each edge is replaced with a set of
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• Once an Euler Path is construct
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Load TreeConstruct Euler Path EPPer
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120.00160.00100.00140.00Time (Milli
Page 75 and 76:
• Kernel Cycles consists of• Da
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Memory Transactions128-byte segment
Page 80 and 81:
• Calculations
Page 82 and 83:
• Exploiting massive parallelism
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• 2007 - 2008 Course Work at IIIT
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