PCA9532 16-bit I C LED dimmer - E-LAB Computers

Philips Semiconductors16-bit I 2 C LED dimmerProduct dataPCA9532POWER-ON RESETWhen power is applied to V DD , an internal Power-On Reset holdsthe PCA9532 in a reset state until V DD has reached V POR . At thispoint, the reset condition is released and the PCA9532 registers areinitialized to their default states, all the outputs in the off state.EXTERNAL RESETA reset can be accomplished by holding the RESET pin LOW for aminimum of t W . The PCA9532 registers and I 2 C state machine willbe held in their default state until the RESET input is once againHIGH.This input requires a pull-up resistor to V DD .Start and stop conditionsBoth data and clock lines remain HIGH when the bus is not busy. AHIGH-to-LOW transition of the data line, while the clock is HIGH isdefined as the start condition (S). A LOW-to-HIGH transition of thedata line while the clock is HIGH is defined as the stop condition (P)(see Figure 7).System configurationA device generating a message is a transmitter: a device receivingis the receiver. The device that controls the message is the masterand the devices which are controlled by the master are the slaves(see Figure 8).CHARACTERISTICS OF THE I 2 C-BUSThe I 2 C-bus is for 2-way, 2-line communication between different ICsor modules. The two lines are a serial data line (SDA) and a serialclock line (SCL). Both lines must be connected to a positive supplyvia a pull-up resistor when connected to the output stages of a device.Data transfer may be initiated only when the bus is not busy.Bit transferOne data bit is transferred during each clock pulse. The data on theSDA line must remain stable during the HIGH period of the clockpulse as changes in the data line at this time will be interpreted ascontrol signals (see Figure 6).SDASCLdata linestable;data validchangeof dataallowedSW00363Figure 6. Bit transferSDASDASCLSPSCLSTART conditionSTOP conditionFigure 7. Definition of start and stop conditionsSW003652003 May 02 7