Chapter 8: Memory Management
Chapter 8: Memory Management
Chapter 8: Memory Management
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Implementation of Page Table!Page table is kept in main memory"Page-table base register (PTBR) points to the page table"Page-table length register (PRLR) indicates size of the pagetable"In this scheme every data/instruction access requires twomemory accesses. One for the page table and one for thedata/instruction."The two memory access problem can be solved by the useof a special fast-lookup hardware cache called associativememory or translation look-aside buffers (TLBs)!Operating System Concepts!8.32! Silberschatz, Galvin and Gagne ©2005!
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