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The PDH hierarchy

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© ICT electronics<br />

<strong>The</strong> <strong>PDH</strong> <strong>hierarchy</strong>


© ICT electronics<br />

Information<br />

Signals<br />

<strong>The</strong> telecommunication networks<br />

only meaningful for the end user<br />

modification of a physical characteristic: electricity, light,<br />

magnetism...relative to time<br />

Transmission media<br />

Nodes<br />

allow the movement of a signal from a source to a target<br />

relay the signals maintaining their characterictics.<br />

<strong>The</strong>re are three basic types:<br />

regenerator, switches/routers and multiplexers<br />

Plesiochronous Digital Hierarchy<br />

2 /32


© ICT electronics<br />

signals<br />

Signals & Information<br />

Information<br />

Analog Digital<br />

Analog Modulation Digital Modulation<br />

Digital Digitalization Codification<br />

Plesiochronous Digital Hierarchy<br />

3 /32


© ICT electronics<br />

Transmission media<br />

Transmission types Transmission obstruction<br />

- Conductors<br />

- Dielectrics<br />

Twisted pair<br />

Coaxial<br />

Optical Fiber<br />

Space<br />

- Attenuation<br />

- Noise<br />

- Distortion<br />

· proportional to the distance<br />

· the signal loses power<br />

· must have a good relation with noise<br />

· thermic<br />

· intermodulation (sum total of frequencies)<br />

· noise point<br />

· different propagation speeds<br />

Plesiochronous Digital Hierarchy<br />

4 /32


© ICT electronics<br />

Telecommunication in evolution<br />

Plesiochronous Digital Hierarchy<br />

5 /32


© ICT electronics<br />

<strong>The</strong> arrival of digital technology<br />

digital<br />

analog<br />

Modem<br />

digital<br />

analog<br />

LE LE<br />

digital<br />

Modem<br />

analog digital analog<br />

LE LE<br />

LE LE<br />

analog<br />

digital<br />

digital<br />

: 1900<br />

: 1960<br />

: 1990<br />

Plesiochronous Digital Hierarchy<br />

6 /32


© ICT electronics<br />

t0<br />

t0<br />

<strong>The</strong> digitalization of signals<br />

SAMPLING<br />

t0 +T ···<br />

ENCODING<br />

001 011 001 101 100<br />

t0+T ···<br />

t<br />

t<br />

011<br />

010<br />

001<br />

000<br />

100<br />

101<br />

110<br />

111<br />

QUANTISATION<br />

t<br />

Plesiochronous Digital Hierarchy<br />

7 /32


© ICT electronics<br />

Nyquist Sampling theorem<br />

“In order to convert an analog signal to digital it is necessary to use a sampling<br />

frequency (f s ) at least two times the highest frequency”<br />

• f s ≥ 2BW (in Hertzs)<br />

i.e. to digitalize a phone channel BW c = 4000 Hz in 8 bits each sample it<br />

would be necessary:<br />

• f s =2*4000=8000 Hz<br />

T= 125μs: this is the base period for all digital networks<br />

codifying:<br />

• 8000 samples/seg* 8 bits/sample = 64.000 bits/seg<br />

this is the basic speed for digital channels<br />

Plesiochronous Digital Hierarchy<br />

8 /32


© ICT electronics<br />

Capacity of a channel: the Shannon Law<br />

<strong>The</strong> capacity of a noisy channel is :<br />

• C= Bw log 2 (1 + P/N)<br />

C: capacity of a channel in bit/s<br />

Bw: Band width in Hz.<br />

P: Signal power<br />

N: media noise<br />

Show a max capacity for a noisy channel for transmitting digital information<br />

Plesiochronous Digital Hierarchy<br />

9 /32


7 V<br />

5 V<br />

3 V<br />

V<br />

- V<br />

-3 V<br />

-5 V<br />

-7 V<br />

© ICT electronics<br />

(3)<br />

(2)<br />

(1)<br />

(0)<br />

(4)<br />

(5)<br />

(6)<br />

(7)<br />

011<br />

010<br />

001<br />

000<br />

100<br />

101<br />

110<br />

111<br />

t 0 t0+T t0+2T<br />

t0 t1 t 2 t 3 t4 t5 t6<br />

Types of digital modulation<br />

t 0+3T t 0+4T<br />

t7 t 8 t 9<br />

t<br />

t<br />

PAM<br />

PDM<br />

PPM<br />

PCM<br />

Delta<br />

Modul.<br />

t 0<br />

t 0<br />

t0+T ···<br />

1 3 1 5 4<br />

t 0<br />

t0<br />

7V<br />

3V 3V<br />

t 0+T ···<br />

t 0+T ···<br />

001 011 001 101 100<br />

t0+T ···<br />

- 3V<br />

- V<br />

1 3 1 5 4<br />

t 0 t 1 t2 t3<br />

t 4 t5 t 6 t 7<br />

t8 t9<br />

t<br />

t<br />

t<br />

t<br />

t<br />

ANALOG<br />

PULSE<br />

MODULATION<br />

DIGITAL<br />

PULSE<br />

MODULATION<br />

Plesiochronous Digital Hierarchy<br />

10 /32


NRZ<br />

AMI<br />

HDB3<br />

CMI<br />

© ICT electronics<br />

+V<br />

0<br />

-V<br />

+V<br />

0<br />

-V<br />

+V<br />

0<br />

-V<br />

+V<br />

0<br />

-V<br />

Line Codification<br />

1 0 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 0<br />

0 0 0 V<br />

B 0 0 V<br />

B 0 0 V<br />

1 0 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 1 0<br />

Plesiochronous Digital Hierarchy<br />

11 /32


© ICT electronics<br />

FDMA<br />

DTE-A BW s1<br />

DTE-B BW s2<br />

.<br />

A<br />

B<br />

C D<br />

F<br />

E<br />

DTE-F<br />

f<br />

BW s1<br />

B<br />

Multiplexing<br />

MULTIPLEXER<br />

A<br />

F<br />

E<br />

t<br />

TDMA<br />

D<br />

C B<br />

A<br />

frame<br />

BW C<br />

Transmission channel<br />

CDMA<br />

110100010110111001<br />

001011101110111001<br />

Bit Bit<br />

Plesiochronous Digital Hierarchy<br />

12 /32


a) Analog switching<br />

© ICT electronics<br />

A(f1), B(f2), C(f3), D(f4)<br />

b) Digital switching<br />

Digital switching<br />

Demodulator<br />

demultiplexer<br />

ABCDABCDABCDABCD<br />

A(f1)<br />

B(f2)<br />

C(f3)<br />

D(f4)<br />

4 channels at the<br />

same frequency<br />

Analog<br />

switch<br />

Digital switch<br />

A(f1)<br />

B(f2)<br />

C(f3)<br />

D(f4)<br />

Modulator<br />

multiplexer<br />

ABABABABAB<br />

A(f1), B(f2)<br />

CDCDCDCDCD<br />

C(f3), D(f4)<br />

Plesiochronous Digital Hierarchy<br />

13 /32


© ICT electronics<br />

Advantages of digital technology<br />

• Reduces hardware cost<br />

• Simplifies swtiching<br />

• Improves reliability, maintenance and quality<br />

• Allows you to offer Quality of Service (QoS)<br />

• Optimizes the use of resources<br />

• Supports audio, data, video under a unified media<br />

• Makes it easier to build computer networks<br />

• Requires more Band Width<br />

• Needs synchronization<br />

...but<br />

Plesiochronous Digital Hierarchy<br />

14 /32


© ICT electronics<br />

Digital milestones<br />

• Telex (Germany 1935) first digital network<br />

• Digitalization (France 1942)<br />

• Fax (Japan 1950)<br />

• Integration (USA 50´s) of transmission and switching<br />

• AT&T (USA 1962) first PTT with digital switching<br />

• Western Electric (USA 1965) first digital transmission PCM 24 channels<br />

• Telefonica (Spain 1968) first packet network<br />

• IDN (USA 70s) first full digital network<br />

• ISDN (Europe 1984) standarized voice and data metwork<br />

• SONET (USA 1988) first installations<br />

• B-ISDN (1989) broadband networks<br />

• ATM (1994) first public ATM net<br />

Plesiochronous Digital Hierarchy<br />

15 /32


© ICT electronics<br />

Plesiochronous Digital Hierarchies<br />

5 th level<br />

4 th level<br />

3 rd level<br />

2 nd level<br />

1 st level<br />

single channel<br />

Europe (CEPT) USA Japan<br />

564992 Kbit/s<br />

139264 Kbit/s<br />

x 4<br />

34368 Kbit/s<br />

x 4<br />

8448 Kbit/s<br />

2048 Kbit/s<br />

x 4 x 3<br />

64 Kbit/s<br />

274176 Kbit/s<br />

44736 Kbit/s<br />

x 30 x 24<br />

6312 Kbit/s<br />

1544 Kbit/s<br />

397200 Kbit/s<br />

x 4 x 4<br />

x 3<br />

x 6<br />

x 7 x 5<br />

x 4<br />

97728 Kbit/s<br />

x 3<br />

32064 Kbit/s<br />

Plesiochronous Digital Hierarchy<br />

16 /32


© ICT electronics<br />

2 Mbit/s<br />

MUX<br />

2<br />

2<br />

2<br />

2<br />

8<br />

8<br />

8<br />

8<br />

<strong>PDH</strong> is a <strong>hierarchy</strong><br />

8 Mbit/s<br />

MUX<br />

8<br />

8<br />

34<br />

34<br />

34 Mbit/s<br />

MUX<br />

34<br />

140<br />

140 Mbit/s<br />

LTE<br />

Four standarized mux levels 2, 8, 34 and 140 Mbit/s<br />

TRANSMISSION MEDIA<br />

COAXIAL CABLE<br />

SATELLITE<br />

RADIO LINK<br />

OPTICAL FIBRE<br />

Plesiochronous Digital Hierarchy<br />

17 /32


© ICT electronics<br />

<strong>PDH</strong><br />

<strong>PDH</strong><br />

<strong>PDH</strong><br />

<strong>PDH</strong><br />

<strong>PDH</strong><br />

<strong>PDH</strong> is plesiochronous<br />

<strong>PDH</strong><br />

clock<br />

alignment<br />

<strong>PDH</strong> islands with their own clock<br />

SWITCH<br />

Plesiochronous Digital Hierarchy<br />

18 /32


© ICT electronics<br />

<strong>The</strong> <strong>PDH</strong> <strong>hierarchy</strong><br />

A<br />

S<br />

T 1<br />

J 11<br />

R 1<br />

a i b i c i d i<br />

C 1<br />

E<br />

1<br />

0<br />

C 2 C 3 C 4<br />

Remote Alarms Indicator (FAS and MFAS)<br />

Spare bits (national use)<br />

i - Tributary bits<br />

Justification control bits<br />

Justification bits<br />

i - Channel CAS bits<br />

CRC-4 Error signaling bits<br />

CAS multiframe alignment<br />

Frame alignment bits<br />

CRC-4 Multiframe alignment<br />

Frame alignment supervision bits<br />

Cyclic Redundancy Checksum bits<br />

Plesiochronous Digital Hierarchy<br />

19 /32


© ICT electronics<br />

Frame 0<br />

Frame 1<br />

Frame 15<br />

<strong>The</strong> 2048Mbit/s basic frame<br />

FAS<br />

NFAS<br />

FAS<br />

NFAS<br />

FAS<br />

NFAS<br />

ch 1<br />

CAS: 30 channels/frame<br />

CCS: 31 channels/frame<br />

ch 2 ch 15<br />

BITS PER SAMPLE: 8 bits<br />

ch 16 ch 17 ch 30<br />

ch 1 ch 2 ch 15 ch 16 ch 17 ch 18 ch 31<br />

MFAS SA S<br />

s1 s16 s 2<br />

s 3<br />

s 14<br />

s 15<br />

SAMPLING RATE (of every channel): 8000 samples/s<br />

CHANNEL BW: 0-3400 Hz<br />

s 17<br />

s 18<br />

s 29<br />

s 30<br />

COMPRESSION LAW: A<br />

INVERSION OF EVENT BITS<br />

Frame duration: 125 μs<br />

Plesiochronous Digital Hierarchy<br />

20 /32


© ICT electronics<br />

Frame alignment<br />

FAS FAS<br />

tributaries bits<br />

Allows targetting of synchronization to find the beginning of the frame<br />

Plesiochronous Digital Hierarchy<br />

21 /32


Frame 0<br />

Frame 1<br />

Frame 2<br />

Frame 3<br />

Frame 14<br />

Frame 15<br />

© ICT electronics<br />

TS0<br />

C 10<br />

0 1 1 0 1 1<br />

0 1 A S<br />

C 20<br />

0 1 1 0 1 1<br />

0 1 A S<br />

C 40<br />

0 1 1 0 1 1<br />

E1<br />

A S<br />

Also called NFAS<br />

FAS<br />

TS2 TS1<br />

TS15<br />

FAS<br />

TS16<br />

0 0 0 0 S A S<br />

Frame Alignment Supervision bit<br />

FAS is only transmitted on odd frames<br />

NFAS uses a bit equal to “1” to avoid coincidences<br />

s 1<br />

s 2<br />

s 3<br />

s 14<br />

s 15<br />

s 16<br />

s 17<br />

s 18<br />

s 29<br />

s 30<br />

TS17 TS18 TS31<br />

Plesiochronous Digital Hierarchy<br />

22 /32


© ICT electronics<br />

Sub-Multiframe<br />

I<br />

Sub-Multiframe<br />

II<br />

Cyclic Redundancy Checksum CRC-4<br />

Frame 0<br />

Frame 8<br />

Frame 15<br />

C 1<br />

0<br />

C 2<br />

0<br />

C 1<br />

C4 E<br />

TS0<br />

FAS<br />

NFAS<br />

FAS<br />

NFAS<br />

FAS<br />

FAS<br />

NFAS<br />

Allows the detection of errors<br />

TS1 TS2 TS15 TS16<br />

C 1 0 C 2 0 C 31 C 4 0 C 11 C 21 C 3 E C 4 E<br />

C 1C 2C 3C 4: CRC-4 check bits for the previous sub-multiframe<br />

001011: CRC alignment signal<br />

EE: CRC distant error indicating bits<br />

MFAS SA S<br />

s1 s16 s 2<br />

s 3<br />

s 8<br />

s 14<br />

s 15<br />

s 17<br />

s 18<br />

s 23<br />

s 29<br />

s 30<br />

TS17 TS18 TS31<br />

Plesiochronous Digital Hierarchy<br />

23 /32


© ICT electronics<br />

Frame 0<br />

Frame 1<br />

Frame 2<br />

Frame 3<br />

Frame 14<br />

Frame 15<br />

8 Mbit/s<br />

TS0<br />

FAS<br />

NFAS<br />

FAS<br />

NFAS<br />

FAS<br />

NFAS<br />

NFAS: No FAS<br />

TS1<br />

Used to manage alarms and errors<br />

DISTANT<br />

ALARM<br />

LTE LTE<br />

8 Mbit/s<br />

FRAME<br />

LOSS<br />

TS2 TS31<br />

Plesiochronous Digital Hierarchy<br />

24 /32


© ICT electronics<br />

Frame 0<br />

Frame 1<br />

Frame 2<br />

Frame 3<br />

Frame 14<br />

Frame 15<br />

bit A: Remote Alarms Indication<br />

TS0<br />

C 1 FAS<br />

0 1A<br />

S<br />

C 2 FAS<br />

0 1A<br />

S<br />

C 4 FAS<br />

E1<br />

A S<br />

TS1 TS15 TS16<br />

MFAS<br />

SA<br />

S<br />

s1 s16 s 2<br />

s 3<br />

s 14<br />

s 15<br />

s 17<br />

s 18<br />

s 29<br />

s 30<br />

TS17 TS31<br />

Plesiochronous Digital Hierarchy<br />

25 /32


Frame 0<br />

Frame 1<br />

Frame 2<br />

Frame 3<br />

Frame 14<br />

Frame 15<br />

© ICT electronics<br />

TS0<br />

C 1 FAS<br />

0 1 AS<br />

SS SS<br />

C 2 FAS<br />

0 1 AS<br />

SS SS<br />

C 4 FAS<br />

E1<br />

AS<br />

SS SS<br />

bits S for PTT use<br />

TS1 TS15 TS16<br />

MFAS SA<br />

SS<br />

s1 s16 s2 s17 s3 s18 s14 s15 s 29<br />

s 30<br />

TS17 TS31<br />

can be used for application, maintenance or monitoring of performance<br />

Plesiochronous Digital Hierarchy<br />

26 /32


Frame 0<br />

Frame 1<br />

Frame 2<br />

Frame 3<br />

Frame 14<br />

Frame 15<br />

© ICT electronics<br />

TS0<br />

FAS<br />

NFAS<br />

FAS<br />

NFAS<br />

FAS<br />

NFAS<br />

CAS Multiframe<br />

TS1 TS2 TS15 TS16<br />

ai bi ci di 0MFAS 0 0 0 S A S<br />

b 1<br />

a 1<br />

b 2<br />

a 2<br />

b 3<br />

a 3<br />

c1 d1a16b 16c<br />

16d<br />

16<br />

c2 d2a17b 17c<br />

17d<br />

17<br />

c3 d3a18b 18c<br />

18d<br />

18<br />

a14b 14c<br />

14d<br />

14a<br />

29b<br />

b 29<br />

c29d 29<br />

a15b 15c15d<br />

15a<br />

30b<br />

b 30<br />

c 30<br />

d 30<br />

: i-channel signalling bits (CAS)<br />

MFAS for CAS<br />

TS17 TS18 TS31<br />

Each of the 30 channels have associated 2 kbit/s, bits a i ,b i ,c i , d i in TS16<br />

Plesiochronous Digital Hierarchy<br />

27 /32


© ICT electronics<br />

Multiframe Alignment Signal (MFAS)<br />

b 1<br />

a 1<br />

b 2<br />

a 2<br />

b 3<br />

a 3<br />

TS16<br />

0MFAS 0 0 0 SA<br />

S<br />

c1 d1 a16 b16 c16 d16 c2 d2 a17 b17 c17 d17 c3 d3 a18 b18 c18 d18 Used to synchronize the CAS<br />

No MFAS<br />

(NMFAS)<br />

Plesiochronous Digital Hierarchy<br />

28 /32


Frame 0<br />

Frame 1<br />

© ICT electronics<br />

TS0<br />

bit A in NMFAS (TS16)<br />

TS1 TS15 TS16<br />

C 1 FAS MFAS SA<br />

S<br />

0 1A<br />

S<br />

s1 s16 TS17 TS31<br />

Alarm bit used to indicate a power fault, loss of incoming signal, or loss of<br />

multiframe alignment<br />

then A=‘1’ the response from the remote side is to set CAS bits to ‘1’<br />

A=1<br />

CAS=1<br />

Plesiochronous Digital Hierarchy<br />

29 /32


Frame 0<br />

Frame 1<br />

Frame 15<br />

© ICT electronics<br />

FAS<br />

NFAS<br />

FAS<br />

NFAS<br />

FAS<br />

NFAS<br />

2 Mbit/s channel structure<br />

ch 1 ch 2 ch 15 ch 16 ch 17 ch 18 ch 31<br />

8 bit per sample<br />

8000 samples per second<br />

30 or 31 channels of information<br />

125μs frame period<br />

3.400 Hz bandwidth per channel<br />

MFAS SA S<br />

s1 s16 s 2<br />

s 3<br />

s 14<br />

s 15<br />

s 17<br />

s 18<br />

s 29<br />

s 30<br />

Plesiochronous Digital Hierarchy<br />

30 /32


RTB<br />

Frame<br />

Relay<br />

Rented<br />

ISDN<br />

Internet<br />

GSM<br />

ATM<br />

© ICT electronics<br />

2<br />

2<br />

2<br />

8<br />

8<br />

8<br />

<strong>PDH</strong> as circuit provider<br />

34<br />

8<br />

<strong>PDH</strong> networks provide circuits to switched public networks.<br />

<strong>The</strong>y are also used to build synchronization networks<br />

8<br />

34<br />

8<br />

8<br />

8<br />

2<br />

2<br />

2<br />

Rented<br />

ISDN<br />

Internet<br />

GSM<br />

ATM<br />

RTB<br />

Plesiochronous Digital Hierarchy<br />

Frame<br />

Relay<br />

31 /32


© ICT electronics<br />

<strong>PDH</strong> network, some problems<br />

• <strong>The</strong> supervision and maintenance functions are limited (just a few<br />

bits for alarms in NFAS, NMFAS and E bit (2 Mbit/s frame)<br />

• In order to get low speed channel (i.e. 2 Mbit/s) from a hight<br />

<strong>hierarchy</strong> (i.e. 140 Mbit/s) a full demultiplexing is need<br />

• Loss of compatibility between European, Japanese and North<br />

American hierachies<br />

• <strong>The</strong>re are no standards for speeds over 140 Mbit/s<br />

• Low management capabilities<br />

Plesiochronous Digital Hierarchy<br />

32 /32

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