Oracle 1Z0-489 Braindumps - The Easy Way to Pass SPARC M6-32 and SPARC M5-32 Server Certified Implementation Specialist 1Z0-489 Exam
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<strong>Oracle</strong><br />
<strong>1Z0</strong>-<strong>489</strong> <strong>Exam</strong><br />
<strong>SPARC</strong> <strong>M6</strong>-<strong>32</strong> <strong>and</strong> <strong>SPARC</strong> <strong>M5</strong>-<strong>32</strong> <strong>Server</strong>s Installation Essentials<br />
Thank you for Downloading <strong>1Z0</strong>-<strong>489</strong> exam PDF Demo<br />
Buy Full Product Here:<br />
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Questions & Answers<br />
(Demo Version --- Limited Edition)
Question 1<br />
You enter the following comm<strong>and</strong> from the service processor; start<br />
accomplish?<br />
/HOSTO/console. What does this<br />
A. Log in <strong>to</strong> the domain as user root via the console.<br />
B. Log In <strong>to</strong> the host as user root from another system.<br />
C. Confrm that the boot disk confguraaon is as expected.<br />
D. Connect <strong>to</strong> the console from the ACTIVE SP.<br />
Aoswern D<br />
Explanaaonn<br />
Referencen<br />
htpsn//docs.oracle.com/cd/EE1972-2E/872-EE88-E7/core_ilom_appa.html<br />
Question 2<br />
A cus<strong>to</strong>mer has a newly installed <strong>SPARC</strong> <strong>M5</strong>-37 pla<strong>to</strong>rm. Afer using the HS processes, the SPs are now<br />
confgured on their network, <strong>and</strong> the cus<strong>to</strong>mer wants <strong>to</strong> confgure the PDomains. Which two opaons<br />
represent choices that the cus<strong>to</strong>mer has <strong>to</strong> set up the pla<strong>to</strong>rm out of the box?<br />
A. accessing a Solaris domain on another host <strong>and</strong> using ipmi <strong>to</strong>ol <strong>to</strong> assign components <strong>to</strong> PDomains<br />
B. using the <strong>Oracle</strong> ILOM BUI <strong>to</strong> assign components <strong>to</strong> PDomains<br />
C. using <strong>Oracle</strong> Ops Center <strong>to</strong> assign components <strong>to</strong> PDomains<br />
D. using the service processor ILOM comm<strong>and</strong>-line interface <strong>to</strong> assign components <strong>to</strong> PDomains<br />
Explanaaonn<br />
Referencen<br />
htpsn//docs.oracle.com/cd/E72355_2E/html/E2E7E2//222220E277785.html<br />
Question 3<br />
Aoswern B, D<br />
You are connecaon serial <strong>and</strong> network cables <strong>to</strong> two SPs located at the front of the server. Your cus<strong>to</strong>mer<br />
has requested that you set this up <strong>to</strong> enable E-GbE network speeds. Which acaon would you take?<br />
A. Connect 37 CAT6A cables from the SPO <strong>and</strong> SPE SER MGT RJ-25 ports <strong>to</strong> separate terminal devices.<br />
B. Connect Category 5 cables from the SPO <strong>and</strong> SPE SER MGT RJ-25 ports <strong>to</strong> separate terminal devices.<br />
C. Connect Category 7 cables from the SPO <strong>and</strong> SPE SER MGT RJ-25 ports <strong>to</strong> separate terminal devices.<br />
D. Connect Category 6 (or beterr cables <strong>and</strong> network devices that support E222BASE-T networks <strong>to</strong><br />
separate terminal devices<br />
Aoswern D
Explanaaonn<br />
Referencen<br />
htpsn//docs.oracle.com/cd/E72355_2E/html/E2E7E2//2222b9dE31<strong>32</strong>96.html<br />
Question 4<br />
When booang up a pre-installed domain, you are asked for some confguraaon informaaon. Where<br />
should you look for that informaaon?<br />
A. System Administraaon Guide<br />
B. Installaaon <strong>and</strong> Confguraaon Plan<br />
C. Installaaon Guide<br />
D. <strong>Server</strong> Product Notes<br />
Explanaaonn<br />
Referencen<br />
htpsn//www.debian.org/releases/stable/armel/install.txt.en<br />
Question 5<br />
Aoswern C<br />
During a site visit <strong>to</strong> a cus<strong>to</strong>mer who has three <strong>SPARC</strong> <strong>M5</strong>-37 pla<strong>to</strong>rms, which two acaons would you<br />
take <strong>to</strong> confrm each pla<strong>to</strong>rm serial number?<br />
A. Visually check for the chassis serial number label at the front lower lef – h<strong>and</strong> side.<br />
B. Using the SP on each pla<strong>to</strong>rm <strong>to</strong> access the ILOM, run show /system serial_ number.<br />
C. Visually check for the chassis serial number label at the front upper right-h<strong>and</strong> side.<br />
D. Using the SP on each pla<strong>to</strong>rm <strong>to</strong> access the ILOM, run show /systemsystem_ idenafcaaon.<br />
E. Visually check for the chassis serial number label at the rear, <strong>to</strong>wards the <strong>to</strong>p, in the middle.<br />
Explanaaonn<br />
Referencen<br />
htpsn//docs.oracle.com/cd/EE1723-2E/872-EE88-E7/core_ilom_overview.html<br />
Question 6<br />
Which three statements are correct about data paths in the <strong>SPARC</strong> <strong>M5</strong>-37 server?<br />
Aoswern B,D<br />
A. Within a DCU, a CPU talks <strong>to</strong> another CPU directly by using the coherency switch. <strong>The</strong> SSB is not<br />
needed.<br />
B. From one DCU <strong>to</strong> a diferent DCU, an even talks with only another even (same for oddr <strong>and</strong> hops <strong>to</strong><br />
the odd-numbered board, if needed, on the desanaaon DCU.<br />
C. From one DCU <strong>to</strong> a diferent DCU, all CPUs can access all PCIe slots In the desanaaon DCU directly in
one hop.<br />
D. A DCU can communicate data only with other DCUs via the BX ASICs on the SSB.<br />
E. From one DCU <strong>to</strong> a diferent DCU, even CPUs can access ail the odd PCIe slots in the desanaaon DCU<br />
directly in one hop.<br />
Explanaaonn<br />
Referencen<br />
htpn//docs.oracle.com/cd/BE252E_2E/server.172/a16533/statspac.htm<br />
Question 7<br />
Which statement is correct?<br />
Aoswern A,C,D<br />
A. <strong>The</strong> <strong>SPARC</strong> <strong>M5</strong>-37 processor has E6 cores, 28MB L3$; T5 processor ha E6 cores, 8MB L3$<br />
B. <strong>The</strong> <strong>SPARC</strong> <strong>M5</strong>-37 processor has 6 cores, 28MB L3$; T5 processor ha E6 cores, 8MB L3$<br />
C. <strong>The</strong> <strong>SPARC</strong> <strong>M5</strong>-37 processor has E6 cores, 72MB L3$; T5 processor ha E6 cores, 8MB L3$<br />
D. <strong>The</strong> <strong>SPARC</strong> <strong>M5</strong>-37 processor has 6 cores, 72MB L3$; T5 processor ha E6 cores, 28MB L3$<br />
Explanaaonn<br />
Referencen<br />
htpn//docs.oracle.com/cd/E72355_2E/html/E2E7E2//2222E33E31711E.html<br />
Question 8<br />
Aoswern B<br />
You power –on PDomain2 <strong>and</strong> noace that it does not go through POST, <strong>Exam</strong>ine the following outputn
In order for this <strong>to</strong> go through post, which property needs <strong>to</strong> be changed?<br />
A. level<br />
B. mode<br />
C. power_on_level<br />
D. error_reset_level<br />
Aoswern C<br />
Question 9<br />
Which three statements are true about the newest clock board redesign/ operaaon in a <strong>SPARC</strong> <strong>M5</strong>-<br />
37/<strong>M6</strong>-37 server?<br />
A. <strong>The</strong>re are two clock boards in a redundant confguraaon, so the failure of the primary clock board<br />
does not cause a reboot of the server.<br />
B. <strong>The</strong>re are two clock boards. Each has two clock sources, so if a clock source fails, the alternate clock<br />
source on the same board takes over.<br />
C. While the system is running on an acave clock board, a faulty clock board can be replaceddynamically.<br />
D. <strong>The</strong>re are two clock boards in a redundant confguraaon, <strong>and</strong> there is a dynamic failover of theprimary<br />
clock board <strong>to</strong> the st<strong>and</strong>by clock board.<br />
Question 10<br />
Which three statements are correct about installing DIMMS?<br />
Aoswern A,B,D
A. Be sure that you are properly grounded before inserang the DIMM(sr in the socket(sr.<br />
B. If a DIMM slot LED is lit, press the Fault Remind bu<strong>to</strong>n <strong>to</strong> turn of the LED.<br />
C. When replacing a faulty CMU, you do not need <strong>to</strong> keep DIMMs in the same locaaons on<br />
thereplacement CMU, because the server has an intelligent load-balance feature.<br />
D. When you press the DIMM Fault Remind bu<strong>to</strong>n, the slot for a faulty DIMM is lit.<br />
E. If a DIMM slot LED is lit, the fault is cleared only by the reset comm<strong>and</strong> In JLOM.<br />
Aoswern B,C,D
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