is127-overview-and-comparison-board-chargers-topologies-semiconductors-choices-and-synchronous-recti

An Overview and Comparison of On 

Board Chargers Topologies, 

semiconductors choices and synchronous 

rectification advantages in Automotive 

Applications 

Davide GIACOMINI 

Principal, Automotive HVICs 

Infineon Italy s.r.l. 

ATV group

Electrical Vehicle Charger Classification 

Level 1: OnBoard Charger 

Charge Time for 25kWh battery 

1.5kW < Power < 3.5kW 

16h < Charge Time < 7h 

Level 2: 

External Charger 

Level 3: 

Charger Station 

3.5kW < Power < 10kW 

7h < Charge Time < 2.5h 

10kW < Power < 25kW 

2.5h < Charge Time < 1h 

http://avt.inl.gov/pdf/phev/phevInfrastructureReport08.pdf 

2017-05-11 Copyright © Infineon Technologies AG 2017. All rights reserved. 

2

Level 1 AC/DC Onboard Charger 

Each Electrical Vehicle has an Onboard charger : 

• The output power is between 1.5kW and 3.5kW 

• AC input : 16A @ 110V/240V → 2.2kW/3.8kW 

• DC Output: 200 - 450V 

110V - 240V 

AC SOURCE 

ONBOARD CHARGER 

+ 

- 

200V - 450V 

High Voltage 

Battery 

AC/DC PFC 

DC/DC 

http://avt.inl.gov/pdf/phev/phevInfrastructureReport08.pdf 


3

+ 

On Board Charger (AC/DC) 

Application 

• PFC + DC-DC 

• Output voltage 

250-450V 

• Output power from 

1,5 kWh to 4 kWh 

Double 

Isolation 

HVD 

400V 

HV batt. 

µP 

Output 

diodes 

Out Filter 

HV Semiconductor 

chipset 

2ph 

110V/220V 

AC input 

HVD 

In Filter 

PFC 

Input 

diodes 

• HV MOSFET or ultra 

Fast IGBT 

• EASY modules 

• Fast gate driver IC 

• HV Diodes 

• SiC Mosfets 


4

On board chargers: simplified schematic 

CV/CC 

charge 

SiC or 

FRED 

diode 

SiC or FRED 

diodes 

CoolMos 

CFDA 

CoolMos 

CFDA 

Isolated from GND 

LIN/CAN 

Double 

Isolation 

Low Side 

Driver 

Half Bridge 

Driver 

I/V Battery 

Monitoring 

BMS 

Isolation 

uP controller 

Isolated from GND 


5

PFC stage: 

Conventional Boost PFC 

› SB: typically superjunction 

› DB: Ultrafast Diode or SiC Schottky for lowest loss 

› Can achieve >96% efficiency 

Typical operating frequency

PFC stage: 

Interleaved Boost PFC 

› QBx: typically superjunction 

› DBx: Ultrafast Diode or SiC Schottky for lowest loss 

› Operation 180° out of phase 

› Reduces input/output ripple and achieves >96% efficiency 

Doubles the effective switching 

frequency 

• Reduces EMI and input filter 

size 

• Reduces output ripple 

Can work in Discontinuous or 

Critical mode on each section 

since current ripple add on input 

bridge 

Dominant loss is input bridge 

rectifier 

• 1-2% total efficiency loss due 

to input bridge 

REF: “An Automotive On-Board 3.3 kW Battery Charger for PHEV Application”, Deepak Gautam, Fariborz Musavi, 

Murray Edington, Wilson Eberle, William G. Dunford; VEHICLE POWER AND PROPULSION CONFERENCE (VPPC), 

2011 IEEE 


7

PFC stage: 

Dual Boost Bridgeless PFC 

› Dual boost configuration, no ripple cancellation 

› Saves 2 diodes vs. interleaved boost PFC 

› S1, S2: typically superjunction 

› D1, D2: Ultrafast Diode or SiC Schottky for lowest loss 

VPFC 

D1 

D2 

S1, D1 and S2, D2 work on semi 

sinusoids 

Cb 

RL 

Only one input diode in conduction 

at all times 

• 50% losses on input diodes vs. 

bridge configuration 

• Achieves 98% efficiency 

Da 

Db 

S1 

S2 

Switch losses are dominated by: 

• Conduction (especially severe 

for high ripple CrCM and DCM) 

• Turn-on speed 

• Eoss (energy in Coss) only for 

CCM) 

• Turn-off speed 

Compared to Conventional boost PFC, eliminates 1 diode drop and adds an entire boost stage 

REF: «Performance Evaluation of Bridgeless PFC Boost Rectifiers», Laszlo Huber, Yungtaek Jang and Milan M. Jovanovic; 

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 3, MAY 2008 


8

PFC stage: 

Totem Pole PFC 

› Requires HV switches with good body diode 

› Uses only 2 diodes and 2 switches 

› S1, S2: cannot be Superjunction, use SiC or GaN 

› D1, D2: slow speed low Fwd diodes => eliminates SiC need 

S2 

D2 

Cb 

VPFC 

RL 

Can achieve > 98% efficiency 

D1 and D2 work on semi 

sinusoids, can be replaced by SJ 

Mosfets 

Only one input diode in conduction 

at all times 

• 50% losses on input diodes vs. 

bridge configuration 

CCM mode of operation 

S1 

D1 


• Conduction 


• Eoss (energy in Coss) 


REF: «Design of GaN-Based MHz Totem-Pole PFC Rectifier», Zhengyang Liu, Fred C. Lee, Qiang Li; 

IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS, VOL. 4, NO. 3, SEPTEMBER 2016 


9

PFC stage: 

Full Bridge Totem Pole PFC 

› Requires HV switches with good body diode => topology is GaN or SiC enabled 

› Uses only 4 switches, all work in PWM mode 

› No diodes involved, reduces crossover distortion 

› Switches cannot be Superjunction, need fast body diode 

VPFC 

Can achieve > 98% efficiency 

Most complex solution. 

S2 

S4 

No diodes in conduction, except 

during dead times 

• Reduced cross over distortion 

Cb 

RL 

CCM mode of operation 



• Eoss (energy in Coss) 


S1 

S3 

REF: «Evaluation of a non-isolated charger», Robert Nystrom, Yuxuan He; Department of Energy and Environment 

Division of Electric Power Engineering, CHALMERS UNIVERSITY OF TECHNOLOGY, GOTHENBURG, SWEDEN 2012 


10

Integrated motor drive and battery charger 

› Uses existing inverter for double function: traction and charger 

› Inverter uses IGBTs, not optimal switches for a charger, efficiency not at top. 

› Not isolated from mains => need large EMI filter, more complex monitoring 

› Saves BOM and costs but adds complexity Needs a split-winding motor 

configuration to avoid torque 

during charging 

Power 

IGBT antiparallel diodes have to 

be chosen accordingly 

Efficiency not at the top 

Switch losses are dominated 

by: 

• IGBT fwd dropout 

Power 

Boost Inductor 

Boost Inductor 

REF: «Grid-Connected Integrated Battery Chargers in Vehicle Applications: Review and New Solution», Saeid Haghbin, Sonja 

Lundmark, Mats Alaküla, and Ola Carlson; IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 60, NO. 2, FEB. 2013 

«Review of Battery Charger Topologies, Charging Power Levels, and Infrastructure for Plug-In Electric and Hybrid Vehicles», 

Murat Yilmaz and Philip T. Krein; IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 28, NO. 5, MAY 2013 


11

Conventional PFC losses in OBC 

PFC stage power loss breakdown 

› Total losses: 96,5W 

32,5% 

Output 

Source: Design of High Efficiency High Power Density 10,5kW 

3ph PBC for (H)Evs, G. Yang and all, PCIM Europe 2016 

› In a standard boost PFC the input stage is still today using diodes since: 

› No need for control signal; 

› HV mosfets so far didn’t have a low enough Rds-on vs price to become competitive 

versus diodes. Now the use of new generation technologies or new material allows 

this. 

Power dissipated in the input bridge is high compared to the global balance; 


12

DC/DC stage: 

ZVS phase shift (ZVS-PS) 

› Usually Full Bridge configuration for higher energy density 

› S1-S4: HV mosfets or SiC with fast body diode 

› D1-D4: Ultrafast Diode or SiC Schottky 

› Frequency around 100kHz typically 

Vbus 

Lo 

Vbatt 

PWM control needs dead time 

adjustment with load and Vbus 

changes 

S1 

S2 

Lr 

D1 

D2 

Co 

HV 

batt. 

Voltage Mode control uses 50% 

duty cycle and needs large value 

DC decoupling capacitor at primary 

Leading edge switches are more 

difficult to achieve ZVS at light load 

D3 

D4 

Synchronous rectification at 

secondary would require 

recontruction signal from primary 

diagonals controls. 

S3 

S4 

Relevant losses on output 

bridge rectifier 


13

DC/DC stage: 

LLC resonant 

› Usually Full Bridge configuration for higher energy density 

› Most popular working above resonance (ZVS mode) 

› S1-S4: Typically Superjunction or SiC 


› Frequency range < 200kHz typically 

Vbus 

S1 

S2 

Lr 

Cr 

D1 

D3 

D2 

D4 

Lo 

Co 

Vbatt 

HV 

batt. 

Input and Output sinusoidal current => 

easier filtering and lower EMI 

50% duty cycle control 

Small or no output inductor => lower 

overvoltage on secondary diodes May 

allow 600V mosfet synchronous 

rectification 

Needs low value high voltage capacitor 

for resonance, also providing DC 

decoupling 

Simpler control strategy than ZVS-PS 

(frequency variation) 

Synchronous rectification at secondary 

would require extra current or voltage 

sensing, since phase shift with input 

changes with load and Vbus 

S3 

S4 

Relevant losses on output bridge 



14

DC/DC stage: 

LLC resonant below resonance 

› Full Bridge configuration for higher energy density 

› S1-S4: HV mosfets or SiC, need ultrafast body diode 

› Not popular since cannot use Superjunction (ZCS mode) 


› Frequency range < 200kHz typically 

Vbus 

Input and Output sinusoidal current 

=> easier filtering and lower EMI 

Small or no output inductor => lower 

overvoltage on secondary diodes 

May allow 600V mosfet synchronous 

rectification 

S1 

S2 

Lr 

Cr 

D1 

D3 

D2 

D4 

Co 

Vbatt 

HV 

batt. 

Frequency reduces at light load 

where converter operates most of 

the time => lower switching losses 

Simpler control strategy than ZVS- 

PS (frequency variation) 

Synchronous rectification at 

secondary would require extra 

current or voltage sensing, since 

phase shift with input changes with 

load and Vbus 

S3 

S4 

Relevant losses on output bridge 



15

HV DC/DC –LLC converter in OBC 

› LLC stage power loss breakdown 

Total losses: 105.1W 

Output 

50,1% 

Source: Design of High Efficiency High Power Density 10,5kW 

3ph PBC for (H)Evs, G. Yang and all, PCIM Europe 2016 

› In a OBC the output stage is still today using diodes since: 

› No need for control signal, however not easily available in a LLC topology, mostly 

used in OBCs for its sinusoidal current waveform; 

› HV mosfets so far didn’t have a low enough Rds-on vs price, to become competitive 

versus diodes. Now the use of new generation technologies or new material allows 

this. 

Power dissipated in the output bridge is very high compared to the global balance; 

many designers are looking for a viable solution 


16

Primary gate drivers 

SR Gate Signal 

Synchonous Rectification easily implemented 

Primary Side 

Secondary Side 

uP 

controller 

SR PWM 

generation 

Optoisolation 

Gate Driver 

Signal Conditioning 

Gate Driver 

AUIRS1170S replaces: 

› 1 current sensing IC 

› Some SW development in uP 

› 1 opto 

› 1 Gate driver 

REF: «3 kW dual-phase LLC demo board Using 600 V CoolMOS P7 and digital control by XMC4400» AN_201703, INFINEON, MARCH 2017 


17

Self controlled, 600V active bridge scheme 

Vout 

Iout => 

Iin => 

Vinm 

Vinp 

Output 

Vd1 

Vd2 

› 1x AUIRS1170S + 4 SMD components replace each large diode of the bridge 

› As shown this will save around 50% of the losses in the HV-DC/DC converter 

output stage and 33% in the input bridge 

› This will also greatly reduce the size of heat sinks and save money on 

mechanics, to compensate higher cost of Mosfet + SR_IC 


18

600V active bridge simulation, sinusoidal 

current input 

Vout 

Vd1 

Vd2 

Vinp-Vinm 

Vg2 & 

Vg4-Vs4 

Vg1 & 

Vg3-Vs3 

Iout 

Iin 

Iin= sin. current gen. 4Apeak @ 85kHz, Vout = 500V, Rload = 200W, Cout=100ouF, Pout= 1250W 

Gate voltages accurately track the input current, a slight delay (600ns) is visible at turn-on 


19

600V active bridge 

hardware and test 

• No heatsink needed! 

• At 8A – 380V output (3kW), Tcase = 45C 

(only 20C above Ta) 

• Saves about 16W power => diodes would 

need at least a

600V active bridge in a 4kW DC/DC stage 

Waveforms comparison 

400V 

Active bridge 

Vg1 

Vg2 

Body Diodes 

Iout 

Iout 

Vprim 

Vprim 

Iout 

Ultrafast Diodes 

Vd2 

Low Iout 

Vg2 

Vprim 

Vout 

Iout 

Vprim 


21

Conclusions 

› Several solutions are existing in the market for On Board Chargers, PFC and 

DC/DC stages use many different topologies; 

› New topologies are enabled and give a significant benefit by using Wide Bandgap 

switches, SiC and GaN; 

› Input and output diodes represent a large portion of total losses, due to their 

high forward dropout, in both PFC and DC/DC stages: 

– In a standard boost PFC, around 33% of total power losses are in the input 

bridge diodes; 

– In a HV-DC/DC converter, around 45-50% power losses are in the output 

Ultrafast Diodes rectification; 

› Synchronous rectification may allow good reduction of diodes’ losses in both 

stages and boost efficiency of standard topologies: 

– This will also greatly reduce the size of heat sinks and save money on 

hardware, to compensate higher cost of Mosfet+SR_IC; 

› Slow body diodes of most very low RDS-on MOSFETs may reduce the Synch- 

Rect advantage, use of SiC or GaN switches can avoid this drawback. 

› For input bridges the advantage of using synchronous rectification is much more 

evident since the lower operating frequency. 


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is127-overview-and-comparison-board-chargers-topologies-semiconductors-choices-and-synchronous-recti

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