MIPS and SPIM tutorial

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x68 (Little Endian) 1 Word Character ’d’ ’c’ ’b’ ’a’ ASCII 0x64 0x63 0x62 0x61 Address 0x10010003 0x10010002 0x10010001 0x10010000 SPARC (Big Endian) 1 Word Character ’a’ ’b’ ’c’ ’d’ ASCII 0x61 0x62 0x63 0x64 Address 0x10010000 0x10010001 0x10010002 0x10010003
A MIPS processor can be configured to use either Litte Endian or Big Endian byte order. SPIM is a simulator and uses the same byte order as the host machine.
Page 1 and 2: MIPS and SPIM tutorial Part Four: S
Page 3 and 4: .asciiz A directive that stores a N
Page 5 and 6: Load Byte: lb Ok, just like Load Wo
Page 7 and 8: The label STR is refering to the ad
Page 9 and 10: Load Byte $t2 is 0x00000061 The con
Page 11 and 12: Load Byte $t4 is 0x00000063 The con
Page 13 and 14: Word stored in $t1 Character ’d
Page 15: x68 1 Word Character ’d’ ’c
Page 19 and 20: When you run this program, a consol
Page 21 and 22: loop.s .text .globl main main: add
Page 23 and 24: loop.s .text .globl main main: add
Page 25 and 26: Load the source file loop.s
Page 27 and 28: Machine Instruction: 0x11100006 Hex
Page 31 and 32: if_then_else.s Branch Not Equal: bn
Page 33 and 34: array.s ARRAY is a label, i.e, the
Page 35 and 36: array.s ARRAY: .word 1 1 2 3 5 8 13
Page 37 and 38: Example: 5 10 = 00101 2 A clever wa
Page 41 and 42: array_of_string.s Declear three str
Page 43 and 44: array_of_string.s (text segment par
Page 45 and 46: ASCII(’h’) = 0x68 ASCII(’e’
Page 47: You are now done with part four of

MIPS and SPIM tutorial

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