Communicating via HDLC over a TDM Interface with a QUICC ...

Code Listing
// definition matches the format used by the QUICC Engine.
typedef struct
{
} bd_t;
UBYTE cntrl;
UBYTE stat;
UWORD len;
char* buf_ptr;
// allocate space in main memory for the transmit and receive buffers.
char g_txbuf[BUF_SIZE];
char g_rxbuf[BUF_SIZE];
// Define offsets in MURAM for TX and RX buffer descriptors.
#define RX_BD_OFFSET 0x0000
#define TX_BD_OFFSET 0x0100
// Define offsets in MURAM for VFIFOs.
#define UCC8_RX_VFIFO 0x001200
#define UCC8_TX_VFIFO 0x001800
// Define offsets in MURAM for RX & TX internal data pointers.
#define UCC8_RIPTR 0x1000
#define UCC8_TIPTR 0x1a00
/****************************************************************************/
// function: init_brg
// parameters: none
// return value: none
// assumptions:
// QE clock is 250 MHz.
// The IMMR define matches the value loaded into the real IMMR.
// hardware effects:
// BRG3 enabled to produce a 1.552 MHz clock.
Communicating via HDLC over a TDM Interface with a QUICC Engine UCC, Rev. 0
20 Freescale Semiconductor