Smart Card IC Design EEPROM RAM ROM CPU Coprocessors Logic
Smart Card IC Design EEPROM RAM ROM CPU Coprocessors Logic
Smart Card IC Design EEPROM RAM ROM CPU Coprocessors Logic
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Implementation of<br />
Signature algorithms on FameXE<br />
• The following timings were achieved for<br />
ECDSA signature verification<br />
using projective coordinates without precomputations:<br />
191 bits 157 bits<br />
Scalar multiplication 27.6 ms 24.5 ms<br />
Total time 28.8 ms 25.6 ms<br />
Semiconductors, BUID, CCC Kim Nguyen, Essen, 2002-09-23 2
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