Op Amp Applications from Analog Devices - Get a Free Blog

OP AMP APPLICATIONS
input common mode limits, 7.75-77
input differential protection, 7.86-87
input and output voltage dynamic ranges,
1.18
input overvoltage, 1.43
input and RFI rectification, 7.126-127
input stages, 1.34-43
bias current compensated bipolar,
1.36-37
bias current compensated super-beta
bipolar, 1.38
bipolar, 1.34-35
FET, 1.38-39
overvoltage considerations, 1.43
rail-rail, 1.40-43
integrated circuit, H.45-72
inverter, 1.8
inverting
external offset trim methods, circuit,
1.57
and noninverting, guard techniques,
4.45
protection, 7.82-83
summer, 1.9
inverting mode operation, H.2
JFET
output phase-reversal, 7.90
output voltage phase-reversal, 7.83-84
JFET IC, H.65
Karl Swartzel, H.14-15
limitations in filters, 5.106-107
load immunity, 1.18
long-term stability, 1.58
low noise, filtering, noise performance,
3.45
low noise JFET IC, H.65
low source impedance, 1.4
low-drift, high gain, H.20-21
low-leakage input clamping, 7.78
macromodel
accuracy checking, 7.149
current feedback, input and gain
stages, 7.147
metal migration, 7.76
model 3xx series varactor bridge, H.35
modern IC packages, scale, H.59
modular, H.30
designs, H.31-40
multiplexed data acquisition,
applications, 3.26-27
multistage, 1.26
naming, H.16
by Ragazinni, 1.3
noise, 1.76-87
components, 6.148
frequency characteristic, diagram,
1.79
popcorn noise, 1.80
Index 26
RMS noise, 1.80-83
total noise calculations, 1.83-87
noise figure, 1.79
noise gain and signal gain, manipulation,
1.63
noise model, 1.84
first-order circuit, 3.12
RTI and RTO noise, 3.12
second-order system, 1.85-86
non-IC solid state, H.1
non-ideal
circuit, 1.10
error multiplier, 1.11
gain stability, 1.12
loop gain, 1.12-13
frequency dependence, 1.13-15
plots, 1.13
noise gain, 1.11-12
signal gain, 1.11
static errors from finite amplifier
gain, 1.10-15
voltage feedback, 1.14
non-inverting, external offset trim
methods, circuit, 1.57
non-inverting input, H.19-20
normal signals, 7.75
offset voltage, 1.4
open-loop gain, 1.4
out-of-circuit voltage, 7.75
output noise, calculation, 3.12-13
output stages, 1.44-49
offset voltage trim processes, 1.47-49
surge protection, 1.46
output voltage phase-reversal, 7.83-84
over-voltage protection, clamping diode
leakage, 7.77-78
overall loop feedback, H.3
packaging, H.59
passive components, 7.1-24
performance, JFET versus bipolar, 4.65-66
power supply
conditioning techniques, summary, 7.72
and decoupling, 1.92
and power dissipation, 1.92
regulation, 7.51
systems, 7.51-74
precision, 1.18, 1.95-102
characteristics, 1.96
DC error budget analysis, 1.96-97
open-loop gain, 1.95
resolution error, 1.96-97
selection, 1.95
single-supply, performance
characteristics, compared to
OP177F, 1.97
precision bipolar IC, H.55-59
precision JFET IC, H.60-66
process technologies, 1.50