Tutorial 11 ChipscopePro, ISE 10.1 and Xilinx Simulator ... - Cosmiac

Figure 13: JTAG Chain
13. Once the list is accepted by pressing OK the following window shows up. Set the trigger to
design criteria, adjust the data depth to the amount needed and then hit the play button (all of
them are marked in red boxes). One can observe all the output signal variations and do the
verification as needed.
Figure 14: Trigger and data setup