COMPUTER ARCHITECTURE AND ORGANIZATION: An ... - IIUSA

(A) 16 (B) 64 (C) 256 (D) 512 (E) 1024
(A-8) Create a state transition diagram that outputs a 1 whenever the sequence of two-bit inputs
00→01 * →11 is detected. The asterisk means that the bit-pair 01 can appear any number of times
at that position in the sequence, including not at all (zero times). Show the state transition diagram
only (do not create a state table or draw a circuit).
(A-9) Design a finite state machine (FSM) that has two control lines C0 and C1. The FSM has an
output Z that is a 1 if C1C0=00, a 0 ifC1C0=01, the value of its current output if C1C0=10, and the
complement of its current output ifC1C0=11. Just draw a state transition diagram that describes the
behavior of the FSM.
(A-10) For the FSM described by the state table shown below,
(a) What is the smallest number of flip-flops needed to implement the FSM? (Do not apply any
state reduction techniques.)
(b) How many Boolean functions need to be created to implement this FSM? That is, how many
next-state and output functions are there?
(A-11) Design a sequential machine that outputs a 1 when the last three inputs are 011 or 110. Note
that sequences can overlap, so that an input sequence of 0110 will produce an output sequence of
0011. Just show the state transition diagram. Do not reduce the diagram or draw a circuit.
(A-12) Given the state transition diagram shown below, design a circuit for this state machine using D
flip-flop(s) and one 4-to-16 decoder with OR gates. For the state assignment, use the bit pattern
that corresponds to the position of each letter in the alphabet, starting from 0 (A = 000, B = 001, C
= 010, etc.).