Interrupts

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<strong>Interrupts</strong> on the ATmega128 • External interrupt inputs are pins INT7 - INT0 1/4/2010 – They are triggered by: • A high-to-low transition (a falling edge) on one of these pins • A low-to-high transition (a rising edge) on one of these pins • A low level on one of these pins – They are initialized by: • External Interrupt Control Registers – EICRA for INT3:0 – EICRB for INT7:4 6
EICRA INT3 - 0 • External Interrupt Control Register A 1/4/2010 INT3 Control INT2 Control INT1 Control INT0 Control 7
Page 1 and 2: Microprocessor Fundamentals Topic 1
Page 3 and 4: Interrupts • Interrupts are async
Page 5: Maskable/Non-maskable • Interrupt
Page 9 and 10: EICRA INT3 - 0 1/4/2010 Exercise: W
Page 11 and 12: Pins • INT3:0 External Interrupts
Page 13 and 14: Pins • INT3:0 When the appropriat
Page 15 and 16: Pins • INT3:0 Exercise: I want to
Page 17 and 18: Pins • Bits 7 - 4 External Interr
Page 19 and 20: Vectors The complete vector table i
Page 21 and 22: An Example: • So, let’s work th
Page 23 and 24: An Example: We must start our progr
Page 25 and 26: An Example: We need to write the in
Page 27 and 28: An Example: We must start our progr
Page 29 and 30: An Example: Then we must write the
Page 31 and 32: What happens? • So what happens w
Page 33: Summary • In this topic we: - Bec

Interrupts

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