ECE 401L COMMUNICATIONS LABORATORY LAB 7 - University of ...

More documents

Recommendations

Info

Figure 1: (top) Noncoherent demodulation of FSK (bottom) coherent demodulation of FSK. 2. Prelab Assignment You should create a preliminary design for your FSK demodulator. Refinements to the design may be required as you construct and test your circuit. The design can be done as a lab group or individually. Prepare and submit a clear schematic for your design (at least one per lab group). Specify the key design equations used for each module in the design (i.e., BPF center frequency, BPF bandwidth, BPF Q-factor, time constant of envelope detectors, etc). 3. Procedure 3.1 BPF It is recommended that you construct your circuit in modules and test each module. In particular, construct each BPF and test the frequency response. Make sure the center frequency of each is very close to the desired frequency (note the two center frequencies are only 200 Hz apart). You may need to adjust your resistor values (possibly with a potentiometer for R3 to tune the BPF center frequencies). Once you are satisfied with the frequency response you observe, collect at least 10 magnitude frequency response measurements (output peak-to-peak voltage divided by input peak-to-peak voltage) around the center frequency of each BPF and generate a magnitude frequency response plot for each BPF. Do the BPFs behave as expected? It will be helpful to show the two frequency-response plots on the same axis in your report, since they work as a pair. Generate an FSK signal with the waveform generator. Be sure to correctly enter the two frequencies. Set the FSK rate (1/2 the bit rate) initially to 10 Hz to make it easier to test and debug your circuit. Inspect the output of one BPF on Channel 1 and the output of the other on Channel 2. One BPF output should have a large amplitude, while the other is small, and vice versa. If the BPFs appear to be working correctly, increase the FSK rate to 150 Hz (300 bits per second). Capture the outputs of the two BPFs simultaneously at this V.21 rate for your report. R. C. Hardie, Department of Electrical and Computer Engineering, University of Dayton, Fall 2003 2
3.2 Envelope Detectors Next, construct the envelope detectors and test them. Keep in mind they must allow the signal to transition every 1/300-th of a second, but maintain a relatively constant output voltage during the duration of a bit (smoothing out the 1650 Hz or 1850 Hz signal coming in). We recommend starting with a time constant of approximately 3 ms (but again, you may need to tune it for optimum performance). Construct the envelope detectors and connect them to the outputs of the BPFs. Reduce the FSK rate back to 10 Hz signal with the waveform generator and inspect the output of one BPF on Channel 1 and the output of the corresponding envelope detector on Channel 2. The output of the envelope detector should look like a square wave and track the envelope of the BPF output (although some ripple may still be visible). Be sure your input voltage is sufficiently high for the envelope detector to operate correctly. Now increase the FSK rate to 150 Hz. Once you are satisfied with the envelope detectors, capture both envelope detector outputs simultaneously with an FSK rate of 150Hz for the report. 3.3 Comparator Lastly, construct and test the comparator. Apply any periodic input to the comparator and look for the square-wave output that should result (remember the op-amp has no feedback path). Now connected the comparator to the rest of the circuit and try it! Start by using an FSK rate of 10Hz. Verify the output (it should be a square wave synced with the FSK signal). Increase your FSK rate to 150 Hz and capture the output. Demonstrate the operation of the complete circuit to the TA. 3.4 The “Bit-rate Challenge” and Improvements (Optional) If time permits try to see how high a bit rate you can demodulate while maintaining a “clean” output (i.e., it stays high for one bit duration and stays low for the next with little or no oscillations over the duration of a bit). One thing that may improve the system’s performance is to add an RC LPF at the output of the comparator to remove any unwanted oscillations. Use a cutoff frequency above 2x the bit rate in Hertz (to pass the bit pulses) and below 1650 Hz (to suppress the oscillations, tune for optimum performance). Now, pass the output of the LPF through another comparator that compares with zero (ground the negative terminal). Does this output look cleaner? Let’s have a friendly competition to see who can get a clean output at the highest bit rate (the “bit-rate” challenge!). 3.5 Audible Test Now let’s try to construct an “air” modem. Since the V.21 is designed for audible channels (phone lines), we can broadcast the FSK signal audibly and detect it with a microphone. Reduce the amplitude of the FSK signal and then connect a speaker to the waveform generator. Construct an amplifier with a gain of approximately 100 and connect a microphone to the input of the amplifier and connect the output of the amplifier to the FSK demodulator circuit. Slowly increase the amplitude of the FSK signal using the waveform generator and place the microphone near the speaker. Now display the FSK signal on Channel 1 and the output of your FSK demodulator circuit on Channel 2. Does it work? If necessary, reduce the FSK rate. Capture an output waveform. R. C. Hardie, Department of Electrical and Computer Engineering, University of Dayton, Fall 2003 3
Page 1: ECE 401L COMMUNICATIONS LABORATORY
Page 5 and 6: R. C. Hardie, Department of Electri
Page 7 and 8: R. C. Hardie, Department of Electri

ECE 401L COMMUNICATIONS LABORATORY LAB 7 - University of ...

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?