IC Debug

“Chirurgie Chirurgie” am Mikro Chip
Christian Boit
Halbleiterbauelemente
Fakultät Fakult Elektrotechnik und Informatik
TUB Berlin

Mikro Chips:
Integrierte Schaltkreise
Fachsprache Englisch: Englisch
Integrated Circuits (ICs)
Komponenten:
Komponenten:
Aktiv Aktiv schaltende Elemente: Elemente:
Transistoren
Transistoren (FET) in Silizium
Verdrahtungen
Verdrahtungen in darüberliegenden
dar berliegenden Schichten
aus Metallbahnen und Kontakten

Querschnitt durch IC
10µm = 1/100mm oder 20% der Dicke
eines menschlichen Haares
Transistoren
(FETs)
Passivierung
Metall2
Via
Metall1
Kontakt
Iso-Oxid
Si- Wanne
Si-Volumen
3

Electrical Characterization of
Criteria:
Failure: Test Systems
• Test pattern looping
• Quick Modification of Test pattern
• Full Error Cycle Log
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Timing and Waveforms
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Lokale Information über ber Chip
Funktionalität Funktionalit - früher fr her & heute
6

Analysis Through Backside of Die
New packaging techniques:
Flip Chip
Die
Flip-chip substrate
LOC ( Lead On Chip)
Data taken from Fujitsu
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Static Photon Emission Failure Localization
X 0.8
X 5 X 25
X 100
Very Useful in FA:
No Regular Photon Emission in Static CMOS
8

Photon Emission of FET in Saturation
Source Gate Drain
n+ n+
p-substrate
Conduction Pinch-off
channel
region
Source Drain
W/L = 10 w = 1µm
V D = 6V, V G = 3 V
Gate
10 µm
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Operating Condition of FET at Photon Emission
Substrate Drain
Current
[µA]
I sub
I D
[mA]
Substrate
Current
Gate voltage [V] Gate voltage [V]
Light
Intensity
Static CMOS: No Light Emission without Fail
Dynamic CMOS: Light Emission when Inverters flip
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Time Resolved Emission TRE
• timing resolution: 30 - 40 ps
(measured)
• spatial resolution: 500nm
• frontside and backside
• for backside analysis:
die thickness < 100nm
J.C. Tsng, IBM
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TRE in Ring Oscillator - Demonstrator
Courtesy IBM / Richard Ross
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Watching the chip at work
Picosecond
imaging
circuit
analysis
(PICA)
–

Focused Ion Beam
• Local removal of
material +
secondary particle
emission for
imaging
• Delayering in
scanning window
of ion beam
• Selectivity of
Metal/ ILD Glass /Si
by gas addition
(local RIE)
• Deposition of
Metal / Isolator
(local PECVD)
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Previous Process
Circuit Circuit Design Design
Simulation Simulation
Layout LayoutDesign Design
Mask Mask Production Production
Engineering Engineering Sample Sample
Evaluation Evaluation
Production Production
Quality Quality Control Control
Circuit Edit with FIB
Probing Pads at SRAM:
- for evaluation of behavior
of different SRAM cells
- after parallel polishing
down to via 1 level
- to drive and to measure
- up to 7 probing pads are
generated by FIB
FIB
Source:
Infineon
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M5
M4
M3
M2
M1
FIB Editing of ICs through Si Backside
2 - 5 µm
Silicon
Substrate
appr.50 µm
FIB Trench
ILD1
ILD0
Transistor Level
- Opportunity: Editing lower interconnect levels,
Contacts to active device,
re-assessment of frontside analysis techniques
- But: Bottom Co-planarity, Endpoint Detection, Navigation
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Time to Market:
Critical Factor in IC Development
Time To Market
Time to market reduction:
High Profit Phase
Ref – Steve Maher
Demand
0% 100%
Acceleration of design, technology development, ramp up and…
debug (readiness of tests & analysis techniques to new product)
Capacity
0% 100%
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1st Si
T0
IC Development Process
Silicon Debug
T1 T2 T3 T4 T5 T6 T7 T8 T9 Tn…
Product Definition
Test
Department
FA Input
FA Output
Physical
Analysis
Department
Product Design
Debugged IC
1 st Silicon
Debug
Qual
Ramp up
Volume Production
Ref – Steve Maher
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ROI of Debug
~80% 80% of highly innovative IC products get
at least one redesign
Circuit Edit is involved in each redesign
Functional analysis in ~30% ~30%
of redesigns
Full custom products ≈ no redesign
→ more than 50% of revenue is made
with products that get redesign
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FIB: Principle
Connection of two metal lines and cut of one metal line
Pt compound Xe2F
Ga(+)-Beam Ga-BeamGa(+)-Beam
Xe2F + Iodine
Pt
Al
Al
SiO
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Design Modification
Pt strap cuts
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Navigation through
silicon with co-axial co axial
IR and ion column
Backside FIB
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The OptiFIB Column
Photon Beam
Ion Beam
Coaxial Photon-Ion Microscope
Photon Image
Ion Editing
Simultaneous
Imaging & Editing
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PICA - Picosecond Imaging Circuit Analysis
example ring oscillator:
t=3.876ns:
t=4.080ns:
t=6.800ns:
Emission from a
ring oscillator at
various times.
Three ‚optical waveforms‘ of switching
induced light emission from neighbouring
inverters of the ring oscillator;
Vdd -> 0V: high intensity
0V -> Vdd: low intensity
All figures from J.C. Tsng, Picosecond imaging circuit analysis
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PICA - Picosecond Imaging Circuit Analysis
example design analysis:
fail
reference
Time integrated image of light
from a register file while
running a test pattern
producing a fail
fail
‚optical waveform‘ from normal
and faulty latch pair
All figures from J.C. Tsng, Picosecond
imaging circuit analysis
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