Reconfigurable systems in terms of computer architectures
Reconfigurable systems in terms of computer architectures
Reconfigurable systems in terms of computer architectures
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Signal Flow Graph Mapp<strong>in</strong>g<br />
Retim<strong>in</strong>g, Delay management<br />
Partition<strong>in</strong>g, which part runs on which IC<br />
Schedul<strong>in</strong>g, and processor allocation<br />
All for statically scheduled multi-rate signal flow graphs<br />
Basic operation translates to basic <strong>in</strong>struction<br />
explicitly programmed data memory storage<br />
no po<strong>in</strong>ters, no branches<br />
<strong>in</strong>herent stream semantics<br />
Used for complete HDTV studio Camera Development, and<br />
next generation electronic X-ray equipment at Philips<br />
MPSOC 2003, 7-11 July, Chamonix, France, K. Vissers 2-20
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