Reconfigurable systems in terms of computer architectures
Reconfigurable systems in terms of computer architectures
Reconfigurable systems in terms of computer architectures
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Fabric<br />
TILE<br />
Fabric<br />
TILE<br />
Pegasus Top Level<br />
Example Chameleon 6 tile Architecture<br />
High-Speed I/O Bus1<br />
(SB 128-bit 200 MHz)<br />
{ = 3.2 GB/s }<br />
High-Speed I/O Bus2<br />
(SB 128-bit 200 MHz)<br />
{ = 3.2 GB/s }<br />
Rapid IO<br />
port<br />
RAPID<br />
IO<br />
BLOCK<br />
Viterbi<br />
Decoder<br />
RAPID<br />
IO<br />
BLOCK<br />
Rapid IO<br />
port<br />
Fabric Memory Access Bus<br />
(SB 128-bit 200 MHz)<br />
{ = 3.2 GB/S }<br />
Turbo<br />
Decoder<br />
PCIX<br />
port<br />
PCIX<br />
IF<br />
BLOCK<br />
HIGH-SPEED<br />
MPIO<br />
HS-MPIO<br />
port<br />
Fabric<br />
TILE<br />
Fabric<br />
TILE<br />
Rapid IO<br />
port<br />
RAPID<br />
IO<br />
BLOCK<br />
Fabric<br />
TILE<br />
Fabric<br />
TILE<br />
RAPID<br />
IO<br />
BLOCK<br />
Rapid IO<br />
port<br />
SB<br />
Bridge<br />
SB<br />
Bridge<br />
SB 128-bit 200 MHz<br />
{ = 3.2 GB/s }<br />
SB<br />
Bridge<br />
SB<br />
Bridge<br />
USB 2.0<br />
DEV I/F<br />
USB<br />
2.0<br />
host<br />
DDR<br />
DRAM<br />
Controller<br />
Memory Bus<br />
(SB 128-bit 200 MHz)<br />
{ = 3.2 GB/S }<br />
MPSOC 2003, 7-11 July, Chamonix, France, K. Vissers 2-22<br />
SB<br />
Bridge<br />
USB 2.0<br />
HOST I/F<br />
USB<br />
2.0<br />
dev ice<br />
DMA<br />
SB<br />
Bridge<br />
AC97<br />
I/F<br />
AC97<br />
audio port<br />
Flash<br />
EPROM<br />
Parallel<br />
Flash<br />
I/F<br />
DDR<br />
DRAM<br />
JTAG<br />
I/F<br />
JTAG<br />
port<br />
Serial<br />
Flash<br />
EPROM<br />
Serial<br />
Flash<br />
I/F<br />
GPIO<br />
BLOCK<br />
GPIO<br />
(64 PINS)<br />
eJTAG<br />
port<br />
MIPS 64K<br />
CPU<br />
5f<br />
Cache<br />
Processor Bus<br />
(SB 64-bit 200 MHz)<br />
{ = 1.6 GB/S }<br />
LOW-SPEED<br />
MPIO<br />
LS-MPIO<br />
port<br />
Low-Speed I/O Bus<br />
(SB 64-bit 100 MHz)<br />
{ = 800 MB/S }
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