S08 Core

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►Up to 4-cylinder gasoline direct injection engines ►Entry-level diesel engines ►Entry-level transmission Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009. 55 Target Applications Images: © Dreamstime.com TM
►Device Overview ►Target for BLDC motor control and LED driver control market. ►1KB of RAM ►16KB of Flash Memory ►6Ch+2Ch Flextimer for Motor Control with automatic fault protection inputs ►Serial communications Port: SCI /W LIN, IIC, SPI ►One Programmable Gain Amplifier (PGA) ►3 Analog Comparator ►13 channel ADC, 12-bit ►Two Programmable Delay block (PDB) ►8bit Modulo Timer Module (MTIM) ►Full temp range (-40◦C to 125◦C) and 2.7-5.5V operation voltage ►Package: 48pin LQFP ►Schedule • Samples available now • Auto Qual Q3 2009 ► Freescale and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2009. S08MP16 1xIIC 1xSCI 1xSPI GPIO 56 – MTIM In Development 1KB RAM 16KB Flash INT BDM ICS PDB(x2) S08 CPU 20MHz Bus ATD 12b 13ch, 3 comparators (6+2) channel 16bit FelxTimer with PWM functions Device Flash RAM PGA SPI SCI IIC ATD Timer Pins 9S08MP16 16KB 1KB 1 1 1xSCI 1 13-Ch., 12-bit ADC; 3 comparators 6+2- Ch.,16bit ; 1 8bit PGA 48 LQFP 48LQFP TM
Page 1 and 2: Aug 2009 Automotive Microcontroller
Page 3 and 4: Going Green • Stringent emissions
Page 5 and 6: Body Application MCU Freescale and
Page 7 and 8: S08D - In Production ►Family Over
Page 9 and 10: External Power Socket 9V Battery RS
Page 11 and 12: ►Family Overview ►Targets low e
Page 13 and 14: Support Vector CAN Driver Support V
Page 15 and 16: Application Performance / Integrati
Page 17 and 18: ►Family Overview ►Targets autom
Page 19 and 20: XGATE • 16-bit 100Mhz Co-Processo
Page 21 and 22: TAG Counter Buffer-RAM (e.g. 2kx16)
Page 23 and 24: Processing Freescale and the Freesc
Page 25 and 26: ►Family Overview ►Bridges the g
Page 27 and 28: ►I/ O(HIS) Drivers + LIN Master a
Page 29 and 30: System Integration VReg PIT 4ch 32b
Page 31 and 32: CAN CAN CAN LIN LIN LIN Door Lock D
Page 33 and 34: CAN Gateway Fuses Box Replacement B
Page 35 and 36: Cluster Application MCU Freescale a
Page 37 and 38: ►Family Overview ►Targets low e
Page 39 and 40: ►Family Overview ►S12 Entry lev
Page 41 and 42: System Integration VReg Oscillator
Page 43 and 44: Freescale and the Freescale logo ar
Page 45 and 46: Powertrain Freescale and the Freesc
Page 47: Freescale and the Freescale logo ar
Page 51 and 52: ►Internal Clock Source - • Free
Page 53 and 54: Core • Up to 60 MHz PowerPC ISA e
Page 55 and 56: ►Electronic power steering ►Sus
Page 57 and 58: Quality and reliability Freescale a
Page 59 and 60: PPM 5 4 3 2 1 0 Freescale and the F
Page 61 and 62: Qualification Stress Tests for C&I

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