8086 Microprocessor (cont..) - nptel

More documents

Recommendations

Info

Minimum Mode Interface • When the Minimum mode operation is selected, the 8086 provides all control signals needed to implement the memory and I/O interface. • The minimum mode signal can be divided into the following basic groups : address/data bus, status, control, interrupt and DMA. • Address/Data Bus : these lines serve two functions. As an address bus is 20 bits long and consists of signal lines A 0 through A 19 . A 19 represents the MSB and A 0 LSB. A 20bit address gives the 8086 a 1Mbyte memory address space. More over it has an independent I/O address space which is 64K bytes in length. M. Krishna Kumar MM/M1/LU3/V1/2004 18
Minimum Mode Interface ( cont..) • The 16 data bus lines D 0 through D 15 are actually multiplexed with address lines A 0 through A 15 respectively. By multiplexed we mean that the bus work as an address bus during first machine cycle and as a data bus during next machine cycles. D 15 is the MSB and D 0 LSB. • When acting as a data bus, they carry read/write data for memory, input/output data for I/O devices, and interrupt type codes from an interrupt controller. M. Krishna Kumar MM/M1/LU3/V1/2004 19
Page 1 and 2: 8086 Microprocessor (cont..) • It
Page 3 and 4: 8086 Microprocessor (cont..) Minimu
Page 5 and 6: Pin Diagram of 8086 GND AD 14 AD 13
Page 7 and 8: Internal Architecture of 8086 • 8
Page 9 and 10: Internal Architecture of 8086 (cont
Page 17: Internal Architecture of 8086 (cont
Page 21 and 22: Minimum Mode Interface ( cont..)
Page 31 and 32: Maximum Mode Interface • When the
Page 33 and 34: CLK INTR Vcc GND LOCK CLK CRQLCK RE
Page 35 and 36: Maximum Mode Interface (cont..) Sta
Page 37 and 38: Maximum Mode Interface (cont..) •
Page 43 and 44: Minimum Mode 8086 System (cont..)
Page 49 and 50: Minimum Mode 8086 System (cont..) M
Page 51 and 52: Minimum Mode 8086 System (cont..) T
Page 53 and 54: Minimum Mode 8086 System (cont..) C
Page 55 and 56: Maximum Mode 8086 System (cont..)
Page 57 and 58: Maximum Mode 8086 System ( cont..)
Page 67 and 68: Internal Registers of 8086 (cont..)
Page 69 and 70:
Internal Registers of 8086 (cont..)
Page 71 and 72:
Page 73 and 74:
Page 75 and 76:
Internal Registers of 8086 • Auxi
Page 77 and 78:
Addressing Modes • Indexed :- 8-b
Page 79 and 80:
Memory (cont..) • 32-bit addresse
Page 81 and 82:
Memory (cont..) • Accessing data
Page 83 and 84:
Interrupts (cont..) The processor h
Page 85:
Interrupts • Single-step interrup
show all

8086 Microprocessor (cont..) - nptel

You also want an ePaper? Increase the reach of your titles

Delete template?

Save as template?