Curriculum vitae (pdf, en, 50 KB, 10/23/13)
Curriculum vitae (pdf, en, 50 KB, 10/23/13)
Curriculum vitae (pdf, en, 50 KB, 10/23/13)
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PRESENTATIONS AND POSTER SESSIONS<br />
• On the Use of GP-GPUs for Accelerating Compute-int<strong>en</strong>sive EDA Applications, IEEE/ACM Design And<br />
Test in Europe Confer<strong>en</strong>ce (DATE), March 18, 21, 20<strong>13</strong>, Gr<strong>en</strong>oble, Embedded tutorial.<br />
• Energy Aware TLM Platform Simulation via RTL Abstraction, IEEE High Level Design Validation and<br />
Test Workshop (HLDVT), November 7-12, 2012, Huntington Beach.<br />
• Accurate Profiling of Oracles for Self-Checking Time-Constrained Embedded Software, IEEE High Level<br />
Design Validation and Test Workshop (HLDVT), November 7-12, 2012, Huntington Beach.<br />
• The Strange Pair: IP-XACT and UNIVERCM to Integrate Heterog<strong>en</strong>eous Embedded Systems, IEEE High<br />
Level Design Validation and Test Workshop (HLDVT), November 7-12, 2012, Huntington Beach.<br />
• Reconciliation of Heterog<strong>en</strong>eous Embedded System Domains to Gain a Homog<strong>en</strong>eous SW Repres<strong>en</strong>tation,<br />
ACM/SigDa PhD Forum at ACM/IEEE Design Automation Confer<strong>en</strong>ce (DAC), June 01-<strong>10</strong>, 2012,<br />
San Francisco, Poster session.<br />
• SAGA: SystemC Acceleration on GPU Architectures, IEEE Design Automation Confer<strong>en</strong>ce (DAC), June<br />
01-<strong>10</strong>,2012, San Francisco.<br />
• UNIVERCM: a Formal Computational Model for Heterog<strong>en</strong>eous Embedded Systems, ACM/SigDa PhD<br />
Forum at ACM/IEEE Design Automation & Test in Europe Confer<strong>en</strong>ce (DATE), March 12-15, 2012,<br />
Dresd<strong>en</strong>, Poster session.<br />
• MOUSSE: scaling MOdelling and verification to complex heterog<strong>en</strong>eoUS embedded Systems Evolution,<br />
ACM/IEEE Design Automation & Test in Europe Confer<strong>en</strong>ce (DATE), March 12-15, 2012, Dresd<strong>en</strong>.<br />
• Reusing of Properties after Discretization of Hybrid Automata, IEEE Microprocessor Test and Verification<br />
(MTV), December 5-7, 2011, Austin.<br />
• Reusing of Properties after Discretization of Hybrid Automata, IEEE High-Level Design Validation and<br />
Test Workshop (HLDVT), November <strong>10</strong>-11, 2011, Napa Valley, Poster session.<br />
• UNIVERCM the UNIversal VERsatile Computational Model for heterog<strong>en</strong>eous embedded system design,<br />
IEEE High-Level Design Validation and Test Workshop (HLDVT), November <strong>10</strong>-11, 2011, Napa Valley.<br />
• On the Mutation Analysis of SystemC TLM-2.0 Standard, IEEE Microprocessor Test and Verification<br />
(MTV), December 5-11, 2009, Austin.<br />
• Mixing Simulated and Actual Hardware Devices to Validate Device Drivers in a Complex Embedded<br />
Platform, IEEE Microprocessor Test and Verification (MTV), December 5-11, 2009, Austin.<br />
• RTL IP Abstraction into Optimized Embedded Software, IEEE East-West Design and Test Symposium<br />
(EWDTS), September 16-21, 20<strong>10</strong>, St. Petersburg.<br />
• Automatic Customization of Device Drivers for IP-cores Used with Assorted CPU Organizations, ACM/IEEE<br />
International Confer<strong>en</strong>ce on Hardware/Software Codesign and System Synthesis (CODES - ISSS), October<br />
11-16, 2009, Gr<strong>en</strong>oble.<br />
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