IR2101(S)-IR2102(S) & PbF revO.p65

Data Sheet No. PD60043 Rev.O
Features
• Floating channel designed for bootstrap operation
Fully operational to +600V
Tolerant to negative transient voltage
dV/dt immune
• Gate drive supply range from 10 to 20V
• Undervoltage lockout
• 3.3V, 5V, and 15V logic input compatible
• Matched propagation delay for both channels
• Outputs in phase with inputs (IR2101) or out of
phase with inputs (IR2102)
• Also available LEAD-FREE
Description
The IR2101(S)/IR2102(S) are high voltage, high speed
power MOSFET and IGBT drivers with independent
high and low side referenced output channels. Proprietary
HVIC and latch immune CMOS technologies
enable ruggedized monolithic construction. The logic
input is compatible with standard CMOS or LSTTL
Typical Connection
IR2101(S)/IR2102(S) & (PbF)
HIGH AND LOW SIDE DRIVER
Product Summary
V OFFSET
I O +/-
V OUT
t on/off (typ.)
Delay Matching
600V max.
130 mA / 270 mA
10 - 20V
160 & 150 ns
50 ns
output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum
driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in
the high side configuration which operates up to 600 volts.
up to 600V
Packages
8-Lead SOIC
IR2101S/IR2102S
8-Lead PDIP
IR2101/IR2102
V CC
V CC
V B
HIN
HIN
HO
LIN
LIN
COM
V S
LO
TO
LOAD
IR2101
up to 600V
V CC
V CC
V B
HIN
HIN
HO
(Refer to Lead Assignments for correct pin
configuration). This/These diagram(s) show
electrical connections only. Please refer to
our Application Notes and DesignTips for
proper circuit board layout.
LIN
LIN
IR2102
V S
COM LO
TO
LOAD
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IR2101(S)/IR2102(S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters
are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V B High side floating supply voltage -0.3 625
V S High side floating supply offset voltage V B - 25 V B + 0.3
V HO High side floating output voltage V S - 0.3 V B + 0.3
V CC Low side and logic fixed supply voltage -0.3 25
V LO Low side output voltage -0.3 V CC + 0.3
V IN Logic input voltage (HIN & LIN) -0.3 V CC + 0.3
dV S /dt Allowable offset supply voltage transient — 50 V/ns
P D Package power dissipation @ T A ≤ +25°C (8 lead PDIP) — 1.0
W
(8 lead SOIC) — 0.625
Rth JA Thermal resistance, junction to ambient (8 lead PDIP) — 125
°C/W
(8 lead SOIC) — 200
T J Junction temperature — 150
T S Storage temperature -55 150
T L Lead temperature (soldering, 10 seconds) — 300
V
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V S offset rating is tested with all supplies biased at 15V differential.
Symbol Definition Min. Max. Units
V B High side floating supply absolute voltage V S + 10 V S + 20
V S High side floating supply offset voltage Note 1 600
V HO High side floating output voltage V S V B
V CC Low side and logic fixed supply voltage 10 20
V
V LO Low side output voltage 0 V CC
V IN Logic input voltage (HIN & LIN) (IR2101) & (HIN & LIN) (IR2102) 0 V CC
T A Ambient temperature -40 125
°C
Note 1: Logic operational for V S of -5 to +600V. Logic state held for V S of -5V to -V BS . (Please refer to the Design Tip
DT97-3 for more details).
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IR2101(S)/IR2102(S) & (PbF)
Dynamic Electrical Characteristics
V BIAS (V CC , V BS ) = 15V, C L = 1000 pF and T A = 25°C unless otherwise specified.
Symbol Definition Min. Typ. Max. Units Test Conditions
ton Turn-on propagation delay — 160 220 V S = 0V
toff Turn-off propagation delay — 150 220 V S = 600V
ns
tr Turn-on rise time — 100 170
tf Turn-off fall time — 50 90
MT Delay matching, HS & LS turn-on/off — — 50
Static Electrical Characteristics
V BIAS (V CC , V BS ) = 15V and T A = 25°C unless otherwise specified. The V IN , V TH and I IN parameters are referenced to
COM. The V O and I O parameters are referenced to COM and are applicable to the respective output leads: HO or LO.
Symbol Definition Min. Typ. Max. Units Test Conditions
V IH Logic “1” input voltage (IR2101)
3 — — V CC = 10V to 20V
Logic “0” input voltage (IR2102)
V
V IL Logic “0” input voltage (IR2101)
— — 0.8 V CC = 10V to 20V
Logic “1”input voltage (IR2102)
V OH High level output voltage, V BIAS - V O — — 100 I O = 0A
mV
V OL Low level output voltage, V O — — 100 I O = 0A
I LK Offset supply leakage current — — 50 V B = V S = 600V
I QBS Quiescent V BS supply current — 30 55 V IN = 0V or 5V
I QCC Quiescent V CC supply current — 150 270 V IN = 0V or 5V
I IN+ Logic “1” input bias current
— 3 10
µA V IN = 5V (IR2101)
V IN = 0V (IR2102)
I IN- Logic “0” input bias current
V IN = 0V (IR2101)
— — 1
V IN = 5V (IR2102)
V CCUV+ V CC supply undervoltage positive going 8 8.9 9.8
threshold
V CCUV- V CC supply undervoltage negative going 7.4 8.2 9
V
threshold
I O+ Output high short circuit pulsed current 130 210 — V O = 0V
mA V IN = Logic “1”
PW ≤ 10 µs
I O- Output low short circuit pulsed current 270 360 — V O = 15V
V IN = Logic “0”
PW ≤ 10 µs
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IR2101(S)/IR2102(S) & (PbF)
Functional Block Diagram
V B
HV
LEVEL
SHIFT
PULSE
FILTER
R
S
Q
HO
HIN
PULSE
GEN
V S
UV
DETECT
V CC
LIN
LO
COM
IR2101
V B
Vcc
HV
LEVEL
SHIFT
PULSE
FILTER
R
S
Q
HO
HIN
PULSE
GEN
V S
Vcc
UV
DETECT
V CC
LIN
LO
COM
IR2102
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IR2101(S)/IR2102(S) & (PbF)
Lead Definitions
Symbol Description
HIN
HIN
LIN
LIN
V B
HO
V S
V CC
LO
COM
Logic input for high side gate driver output (HO), in phase (IR2101)
Logic input for high side gate driver output (HO), out of phase (IR2102)
Logic input for low side gate driver output (LO), in phase (IR2101)
Logic input for low side gate driver output (LO), out of phase (IR2102)
High side floating supply
High side gate drive output
High side floating supply return
Low side and logic fixed supply
Low side gate drive output
Low side return
Lead Assignments
8 Lead PDIP 8 Lead SOIC
IR2101
IR2101S
8 Lead PDIP 8 Lead SOIC
IR2102
IR2102S
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IR2101(S)/IR2102(S) & (PbF)
HIN
LIN
HIN
LIN
50% 50%
HIN
LIN
HIN
LIN
50% 50%
ton
t r
toff
tf
HO
LO
HO
LO
90% 90%
10% 10%
Figure 1. Input/Output Timing Diagram
Figure 2. Switching Time Waveform Definitions
HIN
LIN
50% 50%
HIN
LIN
50% 50%
LO
HO
10%
MT
MT
90%
LO
HO
Figure 3. Delay Matching Waveform Definitions
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IR2101(S)/IR2102(S) & (PbF)
500
500
Turn-On Delay Time (ns)
400
300
200
100
Max.
Typ.
Turn-On Delay Time (ns)
400
300
200
100
Max.
Typ.
0
0
-50 -25 0 25 50 75 100 125
10 12 14 16 18 20
Temperature (°C)
VBIAS Supply Voltage (V)
Figure 6A. Turn-On Time vs Temperature
Figure 6B. Turn-On Time vs Supply Voltage
500
500
Turn-On Delay Time (ns
400
300
200
100
0
0 2 4 6 8 10 12 14 16 18 20
Turn-Off Delay Time (ns)
400
300
200 Max.
100
Typ.
0
-50 -25 0 25 50 75 100 125
Input Voltage (V)
Temperature (°C)
Figure 6C. Turn-On Time vs Input Voltage
Figure 7A. Turn-Off Time vs Temperature
500
500
Turn-Off Delay Time (ns)
400
300
200
100
Max.
Typ.
Turn-Off Delay Time (ns
400
300
200
100
Max.
Typ.
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 7B. Turn-Off Time vs Supply Voltage
0
0 2 4 6 8 10 12 14 16 18 20
Input Voltage (V)
Figure 7C. Turn-Off Time vs Input Voltage
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IR2101(S)/IR2102(S) & (PbF)
500
500
Turn-On Rise Time (ns)
400
300
200 Max.
100
Typ.
0
-50 -25 0 25 50 75 100 125
Turn-On Rise Time (ns)
400
300
Max.
200
100
Typ.
0
10 12 14 16 18 20
Temperature (°C)
VBIAS Supply Voltage (V)
Figure 9A. Turn-On Rise Time vs Temperature
Figure 9B. Turn-On Rise Time vs Voltage
200
200
Turn-Off Fall Time (ns)
150
100
Max.
50
Typ.
0
-50 -25 0 25 50 75 100 125
Turn-Off Fall Time (ns)
150
Max.
100
50
Typ.
0
10 12 14 16 18 20
Temperature (°C)
VBIAS Supply Voltage (V)
Figure 10A. Turn-Off Fall Time vs Temperature
Figure 10B. Turn-Off Fall Time vs Voltage
Input V oltage (V )
8
7
6
5
4 Min.
3
2
1
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Input V oltage (V )
8
7
6
5
4 Min.
3
2
1
0
10 12 14 16 18 20
Vcc Supply Voltage (V)
Figure 12A. Logic "1" Input Voltage (IR2101)
Logic "0" Input Voltage (IR2102)
vs Temperature
Figure 12B. Logic "1" Input Voltage (IR2101)
Logic "0" Input Voltage (IR2102)
vs Voltage
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IR2101(S)/IR2102(S) & (PbF)
4
4
3.2
3.2
Input V olta g e (V )
2.4
1.6
0.8
Max.
Input V olta g e (V )
2.4
1.6
0.8
Max.
High Level Output Voltage (V)
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Figure 13A. Logic "0" Input Voltage (IR2101)
Logic "1" Input Voltage (IR2102)
vs Temperature
1
0.8
0.6
0.4
0.2
Max.
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Figure 14A. High Level Output
vs Temperature
High Level Output Voltage (V)
0
10 12 14 16 18 20
Vcc Supply Voltage (V)
Figure 13B. Logic "0" Input Voltage (IR2101)
Logic "1" Input Voltage (IR2102)
vs Voltage
1
0.8
0.6
0.4
0.2
M ax.
0
10 12 14 16 18 20
Vcc Supply Voltage (V)
Figure 14B. High Level Output vs Voltage
1
1
Low Level Output Voltage (V)
0.8
0.6
0.4
0.2
Max.
0
-50 -25 0 25 50 75 100 125
Low Level Output Voltage (V)
0.8
0.6
0.4
0.2
M ax.
0
10 12 14 16 18 20
Temperature (°C)
Vcc Supply Voltage (V)
Figure 15A. Low Level Output
vs Temperature
Figure 15B. Low level Output vs Voltage
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IR2101(S)/IR2102(S) & (PbF)
Offset Supply Leakage Current (µA)
500
400
300
200
100
Max.
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Offset Supply Leakage Current (µA)
500
400
300
200
100
Max.
0
0 100 200 300 400 500 600
VB Boost Voltage (V)
Figure 16A. Offset Supply Current
vs Temperature
Figure 16B. Offset Supply Current
vs Voltage
150
150
VBS Supply Current (µA)
120
90
60
30
Max.
Typ.
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
VBS Supply Current (µA)
120
90
60
30
Max.
Typ.
0
10 12 14 16 18 20
VBS Floating Supply Voltage (V)
Figure 17A. VBS Supply Current
vs Temperature
Figure 17B. VBS Supply Current
vs Voltage
700
700
Vcc Supply Current (µA)
600
500
400
300 Max.
200
100 Typ.
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Vcc Supply Current (µA)
600
500
400
300
Max.
200
100
Typ.
0
10 12 14 16 18 20
Vcc Supply Voltage (V)
Figure 18A. Vcc Supply Current
vs Temperature
Figure 18B. Vcc Supply Current
vs Voltage
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IR2101(S)/IR2102(S) & (PbF)
30
30
Logic 1” Input Current (µA)
25
20
15
10
Max.
5
Typ.
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Logic 1” Input Current (µA)
25
20
15
10
5
Max.
Typ.
0
10 12 14 16 18 20
Vcc Supply Voltage (V)
Figure 19A. Logic"1" Input Current
vs Temperature
Figure 19B. Logic"1" Input Current
vs Voltage
5
5
Logic “0” Input Current (µA)
4
3
2
Max.
1
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Logic "0" Input Current (uA)
4
3
2
Max.
1
0
10 12 14 16 18 20
VCC Supply Voltage (V)
Figure 20A. Logic "0" Input Current
vs Temperature
Figure 20B. Logic "0" Input Current
vs Voltage
VCC UVLO Threshold +(V)
11
Max.
10
Typ.
9
Min.
8
7
6
-50 -25 0 25 50 75 100 125
Temperature (°C)
VCC UVLO Threshold - (V)
11
10
Max.
9
Typ.
8
7 Min.
6
-50 -25 0 25 50 75 100 125
Temperature (°C)
Figure 21A. Vcc Undervoltage Threshold(+)
vs Temperature
Figure 21B. Vcc Undervoltage Threshold(-)
vs Temperature
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Output Source Current (mA)
Output Source Current (mA)
IR2101(S)/IR2102(S) & (PbF)
500
500
400
300
Typ.
400
300
200
100
Min.
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Figure 22A. Output Source Current
vs Temperature
200
Typ.
100
Min.
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 22B. Output Source Current
vs Voltage
Output Sink Current (mA)
700
600
500 Typ.
400
300
Min.
200
100
0
-50 -25 0 25 50 75 100 125
Temperature (°C)
Output Sink Current (mA)
700
600
500
400
Typ.
300
200
Min.
100
0
10 12 14 16 18 20
VBIAS Supply Voltage (V)
Figure 23A. Output Sink Current
vs Temperature
Figure 23B. Output Sink Current
vs Voltage
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IR2101(S)/IR2102(S) & (PbF)
Case outlines
8 Lead PDIP
01-6014
01-3003 01 (MS-001AB)
A
E
6
6X
D
5
8 7 6 5
1 2 3 4
e
B
H
0.25 [.010] A
6.46 [.255]
3X 1.27 [.050]
FOOTPRINT
8X 0.72 [.028]
8X 1.78 [.070]
DIM
INC HES MILLIMETERS
MIN MAX MIN MAX
A
A1
b
c
.0532
.0040
.013
.0075
.0688
.0098
.020
.0098
1.35
0.10
0.33
0.19
1.75
0.25
0.51
0.25
D
E
.189
.1497
.1968
.1574
4.80
3.80
5.00
4.00
e .050 BASIC 1.27 BASIC
e1 .025 BASIC 0.635 BASIC
H
K
L
y
.2284
.0099
.016
0°
.2440
.0196
.050
8°
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
e1
A
C
y
K x 45°
8X b
A1
0.25 [.010] C A B
0.10 [.004]
8X L
7
8X c
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
8 Lead SOIC
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
01-6027
01-0021 11 (MS-012AA)
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IR2101(S)/IR2102(S) & (PbF)
LEADFREE PART MARKING INFORMATION
Part number
IRxxxxxx
Date code
YWW?
IR logo
Pin 1
Identifier
? MARKING CODE
P Lead Free Released
Non-Lead Free
Released
?XXXX
Lot Code
(Prod mode - 4 digit SPN code)
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
Basic Part (Non-Lead Free)
8-Lead PDIP IR2101 order IR2101
8-Lead SOIC IR2101S order IR2101S
8-Lead PDIP IR2102 order IR2102
8-Lead SOIC IR2102S order IR2102S
Leadfree Part
8-Lead PDIP IR2101 order IR2101PbF
8-Lead SOIC IR2101S order IR2101SPbF
8-Lead PDIP IR2102 order IR2102PbF
8-Lead SOIC IR2102S order IR2102SPbF
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
This product has been qualified per industrial level
Data and specifications subject to change without notice. 4/2/2004
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